LINEAR TECHNOLOGY VOLUME IX NUMBER 1 FEBRUARY 1999 IN THIS ISSUE... COVER ARTICLE Third-Generation DC/DC Controller Reduces Size and Cost .................. 1 Randy G. Flatness Issue Highlights ............................ 2 LTC(R) in the News ........................... 2 DESIGN FEATURES New Universal Continuous-Time Filter with Extended Frequency Range ... 7 Max W. Hauser SOT-23 Switching Regulators Deliver Low Noise Outputs in a Small Footprint ................... 11 Steve Pietkiewicz Versatile New Switching Regulator Fits in SO-8 ................................. 14 Craig Varga 16-Bit Parallel DAC Has 1LSB Linearity, Ultralow Glitch and Accurate 4-Quadrant Resistors ... 18 Patrick Copley Fast Rate Li-Ion Battery Charger ................................................... 24 Goran Perica DESIGN IDEAS No RSENSE Controller Delivers 12V and 100W at 97% Efficiency .............. 26 Christopher B. Umminger Generating Low Cost, Low Noise, Dual-Voltage Supplies ................. 27 Third-Generation DC/DC Controllers Reduce Size and Cost Introduction The LTC1735 and LTC1736 are the newest members of Linear Technology's third generation of DC/DC controllers. These controllers use the same constant frequency, current mode architecture and Burst ModeTM operation as the previous generation LTC1435-LTC1437 controllers but with improved features. With OPTI-LOOPTM compensation, new protection circuitry, tighter load regulation and strong MOSFET drivers, these controllers are ideal for the current and future generations of CPU power applications. The LTC1735 is pin compatible with the previous generation LTC1435/ LTC1435A controllers with only minor external component changes. by Randy G. Flatness Protection features include internal foldback current limiting, output overvoltage crowbar and optional short-circuit shutdown. The 0.8V 1% reference allows the low output voltages and 1% accuracy that will be demanded by future microprocessors. The operating frequency (synchronizable up to 500kHz) is set by an external capacitor, allowing maximum flexibility in optimizing efficiency. The LTC1736 has all of the features of the LTC1735, plus voltage programming for CPU power, in a 24lead SSOP package. The output voltage in LTC1736 applications is programmed by a 5-bit digital-to-analog converter (DAC) that adjusts the outcontinued on page 3 Ajmal Godil Switched Capacitor Voltage Regulator Provides Current Gain ................. 28 Jeff Witt High Current Step-Down Conversion from Low Input Voltages ............. 30 Dave Dwelley How to Design High Order Filters with Stopband Notches Using the LTC1562 Operational Filter (Part 2) ........... 31 Nello Sevastopoulos DESIGN INFORMATION The LTC1658 and LTC1655: Smallest Rail-to-Rail 14-Bit and 16-Bit DACs ................................................... 36 Hassan Malik New Device Cameos ..................... 37 Design Tools ................................ 39 Sales Offices ............................... 40 Figure 1. LTC1736 evaluation circuit: a complete 5V-24V to 0.9V-2V/12A converter in 2.15in2 of PC board space , LTC and LT are registered trademarks of Linear Technology Corporation. Adaptive Power, Burst Mode, C-Load, FilterCAD, Hot Swap, Linear View, Micropower SwitcherCAD, No RSENSE, Operational Filter, OPTI-LOOP, PolyPhase, SwitcherCAD and UltraFast are trademarks of Linear Technology Corporation. Other product names may be trademarks of the companies that manufacture the products. EDITOR'S PAGE Issue Highlights Happy New Year and welcome to the ninth volume of Linear Technology magazine. This issue is heavy on power products: our cover article introduces the LTC1735 and LTC1736, the newest members of Linear Technology's third generation of DC/DC controllers. These controllers use the same current mode architecture with constant frequency and Burst Mode operation as the LTC1435-LTC1437 controllers but with improved features. With OPTI-LOOP compensation, new protection circuitry, tighter load regulation and strong MOSFET drivers, these controllers are ideal for the current and future generations of CPU power applications. This issue debuts the LTC1530, a synchronous buck regulator controller in the SO-8 package. The LTC1530 is a small, versatile controller that is usable in numerous topologies and over a wide range of power levels. In basic buck applications, the LTC1530 permits the designer to realize very simple, low parts count designs that require minimal real estate. With a little ingenuity, it is possible to develop circuits different than those that the part's designers intended, but which give excellent performance nonetheless. The LT(R)1505 is a constant-current, constant-voltage, current mode switching battery charger using the synchronous buck topology. Its output voltage is preset for 3-4 Li-Ion cells, but can be programmed from 1V to 21V. It features a 0.5% voltage reference, low dropout operation, programmable wall adapter current limiting and efficiencies to 94%. Rounding out our selection of switchers are the LT1611 and LT1613. These current mode, constant frequency devices contain internal 36V switches capable of generating output power in the range of 400mW to 2W, in a 5-lead SOT-23 package. The LT1613 has a standard positive feedback pin and is designed to regulate positive voltages. The LT1611 has a 2 novel feedback scheme designed to directly regulate negative output voltages without the use of level-shifting circuitry. In the filter arena, we premier the LTC1562-2, an extended-frequency version of the LTC1562 quadruple 2nd order, universal, continuous-time filter, described in the February 1998 issue. The LTC1562 introduced Operational FilterTM building blocks, w h i c h s a t i s f y d i v e r s e fi l t e r requirements and applications compactly. The LTC1562-2 has the same block diagram, pinout and packaging as the original LTC1562, but is optimized for higher filter frequencies: 20kHz to 300kHz. Besides covering a full octave of frequencies (150kHz-300kHz) above the range of the LTC1562, the LTC1562-2 also overlaps the LTC1562's utility in the range 20kHz to 150kHz. In this frequency range, the LTC1562-2 typically shows reduced large-signal distortion at a cost of slightly more noise than with the LTC1562. We also introduce a new data converter: the LTC1597 16-bit parallel, current output, low glitch, multiplying DAC. The LTC1597 has outstanding 1LSB linearity over temperature, ultralow glitch impulse, on-chip 4quadrant feedback resistors, low power consumption, asynchronous clear and a versatile parallel interface. For 14bit systems, its pin compatible counterpart, the LTC1591, is an ideal solution. Combined with the LT1468 op amp (introduced in the November 1998 issue), the LTC1597 provides the best in its class, 1.7s settling time to 0.0015%, while maintaining superb DC linearity specifications. Two railto-rail, voltage output DACs can be found in the Design Information section: the 14-bit LTC1658 and the 16-bit LTC1655; these DACs have a flexible 3-wire serial interface that is SPI/ QSPI and MICROWIRETM compatible. They provide a convenient upgrade path for users of LTC's 12-bit voltage output DAC family. MICROWIRE is a trademark of National Semiconductor Corp. LTC in the News... On January 12, 1999, Linear Technology announced its financial results for the second quarter of FY 1999, reporting increased sales and profits compared to the second quarter of the previous year. Net sales and net income for the quarter ended December 27, 1998, were $120,020,000 and $45,904,000, respectively. Reporting the results, Linear Technology President and CEO Robert H. Swanson said, "This quarter proved to be stronger than we initially expected, as the general worldwide economic climate improved. We grew sales and profits 3% sequentially from the previous quarter and added $35.6 million to our cash balance. Our return on sales is an industry leading 38.2%." Prior to the announcement, Linear Technology was named a top stock pick for 1999 in a December 17, 1998 article in USA Today. Jim Craig, manager of the $21 billion Janus fund and one of several financial analysts surveyed interviewed by USA Today, listed Linear Technology among his top picks for the coming year. The December 28 issue of EE Times named Linear Technology Staff Scientist Jim Williams one of nineteen "Times People 98." The issue included a full-page profile on Jim, emphasizing the changes he has seen in analog design over the past two decades. The December 7 issues of both Electronic News and Electronic Buyers' News reported Linear Technology's December announcement of the addition of Wyle Electronics as an authorized distributor. This issue features a rich selection of Design Ideas, including four different power conversion circuits and the second in a series of articles on designing high order filters with stopband notches using the LTC1562 filter ICs. The issue concludes with six New Device Cameos. Linear Technology Magazine * February 1999 DESIGN FEATURES to latch off. Defeating this feature will allow easy troubleshooting of the circuit and PC layout. The internal short-circuit detection and foldback current limiting still remain active, thereby protecting the power supply system from failure. After the design is complete, you can decide whether to enable the latch-off feature. Fault Protection: put voltage from 0.925V to 2.00V, Overcurrent Latch-Off LTC1735/LTC1736, continued from page 1 according to Intel mobile VID specifications. Details The LTC1735 and LTC1736 are synchronous step-down switching regulator controllers that drive external N-Channel power MOSFETs using a programmable fixed frequency OPTILOOP architecture. OPTI-LOOP compensation effectively removes the constraints placed on COUT by other controllers for proper operation (such as limits on low ESRs). A maximum duty cycle limit of 99% provides low dropout operation, which extends operating time in battery operated systems. A forced-continuous control pin reduces noise and RF interference and can assist secondary winding regulation by disabling Burst Mode when the main output is lightly loaded. Soft-start is provided by an external capacitor that can be used to properly sequence supplies. The operating current level is userprogrammable via an external current sense resistor. A wide input-supply range allows operation from 3.5V to 30V (36V maximum). Protection New internal protection features in the LTC1735 and LTC1736 controllers include foldback current limiting, short circuit detection, short-circuit latch-off and overvoltage protection. These features protect the PC board, the MOSFETs and the load itself (the CPU) against faults. Fault Protection: Current Limit and Current Foldback The LTC1735/LTC1736 current comparator has a maximum sense voltage of 75mV, resulting in a maximum MOSFET current of 75mV/RSENSE. The LTC1735/LTC1736 includes current foldback to help further limit load current when the output is shorted to ground. If the output falls by more than one-half, the maximum sense voltage is progressively lowered from 75mV to 30mV. Under shortcircuit conditions with very low duty cycle, the LTC1735/LTC1736 will begin cycle skipping in order to limit the short-circuit current. In this situation, the bottom MOSFET will be on most of the time, conducting the current. The average short-circuit current will be approximately 30mV/ RSENSE. Note that this function is always active and is independent of the short circuit latch-off. Fault Protection: Output Overvoltage Protection (OVP) An output overvoltage crowbar turns on the synchronous MOSFET to blow a system fuse in the input lead when Table 1. Overvoltage protection comparison Operating Condition Soft Latch Hard Latch Fast Transients Controls Overshoot Latches Off Output Shorted to 5V Output Clamped at OVP Latches Off 62.5 VID Voltage Decrease Regulates New Voltage Latches Off 50.0 Noise Controls Output Latches Off 100.0 87.5 LTC1735/ LTC1736 75.0 COSC VALUE (pF) The RUN/SS pin, in addition to providing soft-start capability, also provides the ability to shut off the controller and latch off when an overcurrent condition is detected. The RUN/SS capacitor, CSS, (refer to Figure 5) is used initially to turn on and limit the inrush current of the controller. After the controller has been started and given adequate time to charge the output capacitor and provide full load current, CSS is used as a short-circuit timer. If the output voltage falls to less than 70% of its nominal output voltage after C SS reaches 4.2V, it is assumed that the output is in a severe overcurrent and/or short-circuit condition and CSS begins discharging. If the condition lasts for a long enough period, as determined by the size of CSS, the controller will be shut down until the RUN/SS pin voltage is recycled. This built-in latch-off can be overridden by providing >5A at a compliance of 4V to the RUN/SS pin (refer to the LTC1735/LTC1736 Data Sheet for details). This external current shortens the soft-start period but also prevents net discharge of the RUN/SS capacitor during a severe overcurrent and/or short-circuit condition. Why should you defeat overcurrent latch-off? During the prototyping stage of a design, there may be a problem with noise pickup or poor layout causing the protection circuit 37.5 Shorted Top MOSFET LTC1435/ LTC1436 25.0 Output Voltage Can Reverse 12.5 0 0 100 200 300 400 500 OPERATING FREQUENCY (kHz) 600 Figure 2. COSC value vs frequency for the LTC1435/36 and the LTC1735/36 Linear Technology Magazine * February 1999 Bottom MOSFET Overloads Bottom MOSFET Overloads No When Overload is Removed Resumes Normal Operation Troubleshooting Faults Easy DC Measurements Yes Remains Latched Off Difficult; May Require Digital Oscilloscopes 3 DESIGN FEATURES Table 2. FCB possible states FCB Pin DC Voltage: 0V-0.7V Condition Burst Disabled/ Forced Continuous, Current Reversal Enabled DC Voltage: > 0.9V Burst Mode, No Current Reversal Feedback Resistors Regulating a Secondary Winding (VFCBSYNC > 1.5V) Burst Mode Disabled, No Current Reversal the output of the regulator rises much higher than nominal levels. The crowbar can cause huge currents to flow, greater than in normal operation. This feature is designed to protect against a shorted top MOSFET or short circuits to higher supply rails; it does not protect against a failure of the controller itself. Previous latching crowbar schemes for overvoltage protection have a number of problems (see Table 1). One of the most obvious, not to mention most annoying, is nuisance trips caused by noise or transients momentarily exceeding the OVP threshold. Each time that this occurs with latching OVP, a manual reset is required to restart the regulator. Far more subtle is the resulting output voltage reversal. When the synchronous MOSFET latches on, a large reverse current is loaded into the inductor while the output capacitor is discharging. When the output voltage reaches zero, it does not stop there, but rather continues to go negative until the reverse inductor current is 100% 90% BURST EFFICIENCY (%) 80% 70% 60% SYNC 50% CONTINUOUS 40% 30% 20% 0.001 0.01 0.1 1.0 LOAD CURRENT (A) 10.0 Figure 3. Efficiency vs load current for three modes of operation 4 depleted. This requires a sizable Schottky diode across the output to prevent excessive negative voltage on the output capacitor and load. A further problem on the horizon for latching OVP circuits is their incompatibility with on-the-fly CPU core voltage changes. If an output voltage is reprogrammed from a higher voltage to a lower voltage, the OVP will temporarily indicate a fault, since the output capacitor will momentarily hold the previous, higher output voltage. With latching OVP, the result will be another latch-off, with a manual reset required to attain the new output voltage. To prevent this problem, the OVP threshold must be set above the maximum programmable output voltage, which would do little good when the output voltage was programmed near the bottom of its range. In order to avoid these problems with traditional latching OVP circuits, the LTC1735 and LTC1736 use a new "soft latch" OVP circuit. Regardless of operating mode, the synchronous MOSFET is forced on whenever the output voltage exceeds the regulation point by more than 7.5%. However, if the voltage then returns to a safe level, normal operation is allowed to resume, thereby preventing latch-off caused by noise or voltage reprogramming. Only in the case of a true fault, such as a shorted top MOSFET, will the synchronous MOSFET remain latched on until the input voltage collapses or the system fuse blows. The new soft latch OVP also provides protection and easy diagnosis of other overvoltage faults, such as a lower supply rail shorted to a higher voltage. In this scenario, the output voltage of the higher regulator is pulled down to the OVP voltage of the soft-latched regulator, allowing the problem to be easily diagnosed with DC measurements. On the other hand, latching OVP provides only a millisecond glimpse of the fault as it latches off, forcing the use of expensive digital oscilloscopes for troubleshooting. Three Operating Modes/One Pin: Sync, Burst Disable and Secondary Regulation The FCB pin is a multifunction pin that controls the operation of the synchronous MOSFET and is an input for external clock synchronization. When the FCB pin drops below its 0.8V threshold, continuous mode operation is forced. In this case, the top and bottom MOSFETs continue to be driven synchronously regardless of the load on the main output. Burst Mode operation is disabled and current reversal is allowed in the inductor. In addition to providing a logic input to force continuous synchronous operation and external Table 3. Comparison of LTC1735/36 controllers with LTC1435A/36A-PLL controllers Parameter LTC1735/1736 LTC1435A/1436A-PLL Reference 0.8V 1.19V Load Regulation 0.1% Typ, 0.2% Max 0.5% Typ 0.8% Max Max Current Sense 75mV 150mV Minimum On-Time 200ns 300ns Synchronizable Yes LTC1436A-PLL Only Int VCC Voltage 5.2V (7V Max) 5V (10V Max) Power Good Output LTC1736 Only LTC1436A/36A-PLL Only Current Foldback Internal External Output OV Protection Yes No Output OI Latch-Off Optional No Packages SO16, GN16/G24 SO16, G16/GN24 MOSFET Drivers 3x 1x Linear Technology Magazine * February 1999 DESIGN FEATURES 30 no external connections are made, the FCB pin is pulled high by a 0.25A internal current source. The LTC1735 internal oscillator can be synchronized to an external oscillator by applying a clock signal of at least 1.5VP-P to the FCB pin. When synchronized to an external frequency, Burst Mode operation is disabled but cycle skipping occurs at low load currents since current reversal is inhibited. The bottom gate will come on every 10 clock cycles to ensure that the bootstrap cap is kept refreshed and to keep the frequency above the audio range. The rising edge of an external clock applied to the FCB pin starts a new cycle. The range of synchronization is from 0.9 x fO to 1.3 x fO, with fO set by COSC. Attempting to synchronize to a higher frequency than 1.3 x fO can result in inadequate slope compensation and cause loop instability with high duty cycles. If loop instability is observed while synchronized, additional slope compensation can be obtained by simply decreasing COSC. A plot of operating frequency versus COSC value is shown in Figure 2. Table 2 summarizes the possible states available on the FCB pin. Figure 3 gives a comparison of efficiencies in a regulator for the three operating modes: forced continuous operation, pulse skipping mode (synchronized at f = fO) and Burst Mode operation. B4 B3 B2 B1 B0 VOUT (V) 0 0 0 0 0 2.000V 0 0 0 0 1 1.950V 0 0 0 1 0 1.900V 0 0 0 1 1 1.850V 0 0 1 0 0 1.800V 0 0 1 0 1 1.750V 0 0 1 1 0 1.700V 0 0 1 1 1 1.650V 0 1 0 0 0 1.600V 0 1 0 0 1 1.550V 0 1 0 1 0 1.500V 0 1 0 1 1 1.450V 0 1 1 0 0 1.400V 0 1 1 0 1 1.350V 0 1 1 1 0 1.300V 0 1 1 1 1 * 1 0 0 0 0 1.275V 1 0 0 0 1 1.250V 1 0 0 1 0 1.225V 1 0 0 1 1 1.200V 1 0 1 0 0 1.175V 1 0 1 0 1 1.150V 1 0 1 1 0 1.125V 1 0 1 1 1 1.100V 1 1 0 0 0 1.075V 1 1 0 0 1 1.050V 1 1 0 1 0 1.025V 1 1 0 1 1 1.000V 1 1 1 0 0 0.975V OFF 1 1 1 0 1 0.950V ON 1 1 1 1 0 0.925V 1 1 1 1 1 ** Note: *, ** represent codes without a defined output voltage as specified in Intel specifications. The LTC1736 interprets these codes as a valid inputs and produces output voltage as follows: [01111]=1.250V, [11111]=0.900V. synchronization, the FCB pin provides a means to regulate a flyback winding output. It can force continuous synchronous operation when needed by the flyback winding, regardless of the primary output load. In order to prevent erratic operation if Linear Technology Magazine * February 1999 JP1 BURST MODE 10 5 200 1 2 3 330pF 4 100pF 5 6 CS1, 1000pF 7 8 RUN/SS FCB SGND 400 TG BOOST 600 The LTC1735 is pin compatible with the LTC1435/LTC1435A, with minor component changes. Table 3 shows the differences between the two controllers. The important items to note are: 1. The LTC1735 has a 0.8V reference (versus 1.19V for the LTC1435) that allows lower output voltage operation (down to 0.8V). Thus, the output feedback divider will have to be recalculated for the same output voltage. 2. The LTC1735's maximum current sense voltage is half that of the LTC1435. This reduces the power lost in the sense resistor by half. Hence, for the same maximum output current, the current sense resistor must be cut in half. + 16 15 VIN INT VCC BG SENSE- PGND SENSE+ EXT VCC M2 FDS6680A 0.22F 14 CB1 13 D1 CMDSH-3 SW VOSENSE 12 11 + C4 1F 10 9 C2 4.7F M1 FDS6680A CIN1 CIN3 22F 22F 30V 30V L1 + RCS1 0.005 VOUT 1.6V/9A 2H C3 47pF D2 MBRS340T3 EXT VCC R5 10 RS1 10 R7 10k 1% R3 10k 1% R2 10 PANASONIC ETQP6F2R0HFA *SANYO OSCON 4SP820M 500 Converting to the LTC1735 RF1 4.7 CF1 0.1F COSC LTC1735 ITH 300 Figure 4. MOSFET gate-charge current vs frequency R6, 1M 0.1F RC1 33k C1 47pF 15 +VIN JP2 LATCH-OFF (DISABLED) COSC1 47pF CC2 20 FREQUENCY (kHz) RUN CSS TOP AND BOTTOM MOSFETS = FAIRCHILD NDS6680A 25 0 100 FCB/SYNC INT VCC CC1 GATE-CHARGE CURRENT (mA) Table 4. VID output voltage programming (201) 348-7522 (619) 661-6835 VO CO1 180F 4V + CO3* 820F 4V GND Figure 5. High efficiency 1.6V/9A CPU power supply 5 DESIGN FEATURES Linear Current Comparator Operation 3. The gate drivers of the LTC1735 are 3x the strength of those in the LTC1435. This equates to faster rise and fall times for driving the same MOSFETs plus the capability to drive larger MOSFETs with less efficiency loss due to transition losses. Since the trend in the marketplace has forced output voltages to lower and lower values, the current sense inputs have been optimized for low voltage operation. The current sense comparator has a linear response characteristic, without discontinuities, from 0V to 6V output voltages. In the LTC1435/LTC1435A, two input stages are used to cover this range, so an overlap exists together with a transition region. The LTC1735/LTC1736 uses only one input stage and includes slope compensation that operates over the full output voltage range. This allows the LTC1735/LTC1736 to be operated in grounded RSENSE applications as well. Speed The LTC1735/LTC1736 are designed to be used in higher current applications than the LTC1435 family. Stronger gate drives allow paralleling multiple MOSFETs or higher operating frequencies. The LTC1735 has been optimized for low output voltage operation by reducing the minimum on-time to less than 200ns. Remember, though, that transition losses can still impose significant efficiency penalties at high input voltages and high frequencies. Just because the LTC1735 can operate at frequencies above 300kHz doesn't mean it should. Figure 4 shows a plot of MOSFET charge current versus frequency. LTC1736 Additional Features The LTC1736 includes all the features of the LTC1735, plus 5-bit mobile VID control and a power-good comparator in a 24-lead SSOP package. The window comparator monitors the output voltage and its open-drain output is pulled low when the divided Pentium is a registered trademark of Intel Corp. JP1 BURST MODE FCB/SYNC OFF JP2 LATCH-OFF (DISABLED) ON INT VCC COSC1 47pF RC1 33k CC1 330pF CC2 100pF 1 3 4 5 6 PGOOD INT VCC CS1, 1000pF C1 47pF 7 8 9 10 C3 47pF CF1 0.1F RF1 4.7 + R6, 680k 2 R1 100k +VIN RUN 11 12 24 COSC LTC1736 TG BOOST RUN/SS ITH SW FCB VIN INT VCC SGND PGOOD BG SENSE- PGND SENSE+ EXT VCC VFB VID VCC 21 D1 CMDSH-3 20 + C4 1F 18 VOSENSE B4 B0 B3 B1 B2 Figure 5 shows a 1.6V/9A application using the LTC1735. The input voltage can range from 6V to 26V. Figure 6 shows a VID application using the LTC1736 optimized for output voltages of 1.6V to 1.3V with a 5V to 24V input voltage range. continued on page 35 L1 1.2H RCS1 0.004 D2 MBRS340T3 C2 4.7F 16 15 Applications CB1 0.22F 22 17 + M2 FDS6680A 23 19 CIN1 CIN3 22F 22F 30V 30V voltage is not within 7.5% of the 0.8V reference voltage. The output voltage is digitally set to levels between 0.925V and 2.00V using the voltage identification (VID) inputs B0-B4. The internal 5-bit DAC configured as a precision resistive voltage divider sets the output voltage in 50mV or 25mV increments according to Table 4. The VID codes (00000-11110) are compatible with the Intel mobile Pentium(R) II processor. The LSB (B0) represents 50mV increments in the upper voltage range (2.00V-1.30V) and 25mV increments in the lower voltage range (1.275V- 0.925V). The MSB is B4. When all bits are low or grounded, the output voltage is 2.00V. The LTC1736 also has remote sense capability. The top of the internal resistive divider is connected to VOSENSE and is referenced to the SGND pin. This allows a Kelvin connection for remotely sensing the output voltage directly across the load, eliminating any PC board trace resistance errors. EXT VCC VOUT 0.9V-2.0V /12A RS1 10 VO M1, M3 FDS6680A x2 14 + CO3* 820F 4V 13 MSB LSB JP4 E D C B A R5 10 R2 10 PANASONIC ETQP6F2R0HFA *PANASONIC EEFVEOG181R (201) 348-7522 Authors can be contacted at (408) 432-1900 Figure 6. High efficiency, VID programmable, 0.9V-2.0V/12A CPU power supply 6 Linear Technology Magazine * February 1999 DESIGN FEATURES New Universal Continuous-Time Filter with Extended Frequency Range by Max W. Hauser Introduction The original LTC1562, described in the February 1998 issue of this magazine, is a compact, quadruple 2nd order, universal, continuous-time filter that is DC accurate and user programmable for the 10kHz-150kHz frequency range. The LTC1562 introduced Operational Filter building blocks, whose virtual-ground input, rail-to-rail outputs and precision internal R and C components satisfy diverse filter requirements and applications compactly.1, 2, 3 The design of the LTC1562 entailed choices in the internal R and C values and internal amplifiers, and these elements were optimized to minimize wideband noise. The LTC1562-2 is a new product with the same block diagram, pinout and packaging, but optimized for higher filter frequencies: 20kHz to 300kHz. The internal precision R and C components and amplifiers are different in the LTC1562-2. Besides covering a full octave of frequencies (150kHz- 300kHz) above the range of the LTC1562, the LTC1562-2 also overlaps the LTC1562's utility in the range 20kHz to 150kHz. In this frequency range, the LTC1562-2 typically shows reduced large-signal distortion at a cost of slightly more noise than with the LTC1562. For example, a 100kHz dual 4th order Butterworth lowpass filter with a 5V supply, built with the LTC1562-2 and lightly loaded, exhibited 2nd-harmonic distortion of -103dB and 3rd-harmonic distortion of -112dB at 20kHz with an output of 1VRMS (2.8VP-P), and maintained low distortion even with output swings approaching the full supply voltage (-83dB total harmonic distortion, or THD, at 9.7VP-P output). The LTC1562-2 is, therefore, the product of choice for applications above 150kHz as well as for applications in the 20kHz-150kHz range that are especially distortion sensitive. Both the LTC1562 and the LTC1562-2 can replace LC filters or filters built from high performance op amps and precision capacitors and resistors, with a total surface mount board area of 155mm2 (0.24in2)--smaller than a dime (the smallest US coin). Comparison to the LTC1562 The LTC1562-2 both resembles and differs from the LTC1562 as follows: The parts have identical pin configurations and block diagrams (four independently programmable 2nd order Operational Filter blocks with virtual-ground inputs and rail-torail outputs). In both products, the user can program the filter's centerfrequency parameter (f0) over a wide range, using resistor values that vary as the desired f0 changes up or down from a design-center value. In the LTC1562, this design-center f0 is 100kHz; for the LTC1562-2, the value is 200kHz. The LTC1562 is optimized for lower noise, the LTC1562-2 for higher frequencies. Thus, a single LTC1562 section can deliver 103dB SNR in 200kHz bandwidth (Q = 1), whereas a single LTC1562-2 section supports 99dB SNR in 400kHz. *R1 AND C ARE PRECISION INTERNAL COMPONENTS 1 sR1C* INV V+ V1 V2 INV V1 C V2 - V+ SHUTDOWN SWITCH V- A B + 2ND ORDER SECTIONS V2 INV SHUTDOWN SWITCH SHDN AGND D C + - V1 V2 INV V1 Linear Technology Magazine * February 1999 VIN V2 1562 F02 Figure 1. LTC1562-2 block diagram 1562 F01 ZIN V- INV V1 RQ R2 Figure 2. Single 2nd order Operational Filter section (inside dashed line) with external components added: resistor for ZIN gives lowpass at V2, bandpass at V1; capacitor for ZIN gives bandpass at V2, highpass at V1. 7 DESIGN FEATURES Each chip contains precision R and C components equivalent to eight 0.25% tolerance capacitors and four 0.5% tolerance resistors, as well as twelve op amps with rail-to-rail outputs and excellent high frequency linearity. Both circuits operate from nominal 5V to 10V total supplies (single or split). Single-supply applications can use a halfsupply, ground-reference voltage generated on the chip. Both chips feature a power-down mode that drops the power supply current to zero, except for reverse junction leakages (on the order of 1A total). What the LTC1562-2 Can Do Figure 1 is an overall diagram and Figure 2 a per-section diagram for the LTC1562-2. These are identical to the diagrams for the LTC1562, except for the values of the internal precision components in Figure 2. In the LTC1562-2, R1 is 7958 and C is 100pF. External resistors can be combined with an LTC1562-2 section, as shown in Figure 2, to define a second order filter response with standardized parameters f0, Q and gain. Design equations and procedures appear in the LTC1562-2 data sheet. For example, in Figure 2, R2 sets f0; RQ, a multiple of R2, sets Q; and ZIN sets both the gain and the block's function. The 3-terminal blocks minimize the number of external parts necessary for complete 2nd order sections with programmable f0, Q and gain. A resistor for ZIN in Figure 2 gives simultaneous lowpass (at V3) and bandpass (at V1) responses. The data sheet describes other ways to exploit the virtual ground INV input. For example, because the V1 output in Figure 2 shows a phase shift of 180 at the user-set center frequency, f0, summing a V1 output with a feedforward path from the signal source yields a notch response,2 or with different weighting, allpass (phase equalization), as used in Figure 5 8 RIN2 7.87k VIN1 1 RIN1 7.87k RQ1 4.22k R21 7.87k 5V 3 5 0.1F R23 7.87k RIN3 7.87k INV C V1 B V1 C V2 B V2 C VOUT1 20 19 RQ2 10.2k 18 R22 7.87k 16 V- LTC1562-2 20-PIN 15 SHDN SSOP AGND 13 R24 7.87k 8 V2 A V2 D 12 RQ4 10.2k 9 V1 A V1 D 11 10 INV A INV D V+ 6 RQ3 4.22k VIN2 2 INV B -5V* 0.1F VOUT2 RIN4 7.87k *V- ALSO AT PINS 4, 7, 14 & 17 ALL RESISTORS 1% METAL FILM Figure 3. Dual 4th order 200kHz Butterworth lowpass filter later in this article. Using capacitors together with the INV input's summing capability provides further powerful techniques for zero and notch responses (which, in turn, enable elliptic highpass and lowpass filtering). For example, the two outputs of each 2nd order section have a 90 phase difference, so summing V1 through a capacitor and V2 through a resistor, into another section's virtual-ground input, gives the same notch or allpass option mentioned above but without devoting an additional section for phase shift.4 Figures 5 and 9, described later, use this RC notch method. Moreover, a capacitor for ZIN in Figure 2 yields simultaneous highpass and bandpass responses; the capacitor sets voltage gain, not critical frequencies, with a relationship of the form Gain = CIN/ 100pF in the LTC1562-2. Low level signals can exploit the built-in gain capability, which raises filter SNR with low input voltage amplitudes. Such abilities to tailor the use of each block and its built-in time constants are reminiscent of an operational amplifier--whence the term "operational filter." DC performance includes a typical lowpass input-to-output offset of 3mV and outputs that swing (under load) to within approximately 100mV of each supply rail. An internal halfsupply reference point (the AGND pin) generates a reference voltage for the inputs and outputs in single-supply applications. The shutdown (SHDN) pin accepts CMOS logic levels and in 20s puts the LTC1562-2 into a "sleep" mode, in which the chip consumes approximately 1A (the part will default to this state if the pin is left open). The 16-pin dies is packaged in a 20-pin SSOP (the extra pins in the SSOP are substrate connections, to be returned to the negative supply for best performance). The following application examples are tailored for specific corner frequencies, which can be modified by properly scaling the external components, as described in the data sheet and in LTC1562 application articles.2, 3 Expert application assistance can be obtained by calling us at 408-954-8400, x3761. Pin numbers in the figures that follow are for the 20-pin SSOP package, where pins 4, 7, 14 and 17 (not shown) are always tied to the negative power supply rail. As with other filters, achieving low noise and distortion levels requires electrically clean construction (as well as equipment that can measure such performance). Dual 4th Order 200kHz Butterworth Lowpass Filter Each half of the circuit in Figure 3 provides a classic 4th order lowpass gain roll-off (24dB per octave) with a maximally flat passband. This schematic includes power supply connections for a split 5V supply, one of the options available for any L TC1562-2 Linear Technology Magazine * February 1999 DESIGN FEATURES 10 RFF1 6.19k VIN 0 RB1 1.54k RIN1 7.5k -10 GAIN (dB) -20 1 RQ1 3.24k -30 R21 6.81k -40 -50 5V -70 RQ3 7.32k 1.5M 100k INV B INV C V1 B V1 C V2 B V2 C 20 19 RQ2 4.12k 18 R22 6.19k 16* LTC1562-2 V- 20-PIN 15 SHDN SSOP AGND 13 R24 4.12k 8 V2 A V2 D 12 RQ4 7.32k 9 V1 A V1 D 11 10 INV A INV D V+ 6 R23 4.12k 50k 3 5 0.1F -60 -80 2 1F FREQUENCY (Hz) Figure 4. Frequency response of one of the two filters in Figure 3 application (Figure 5, in a different application, illustrates connections for a single 5V supply). The circuit of Figure 3 is a higher frequency variation of a 100kHz dual 4th order Butterworth lowpass filter using the LTC1562, which appeared in the February 1998 Linear Technology magazine,1 as well as in the LTC1562 data sheet. Figure 4 shows the measured frequency response for one of the two filters in Figure 3. This 5V circuit supports rail-to-rail inputs and outputs, with output noise of approximately 60VRMS, for a maximum SNR of 95dB (compared to 100dB with the LTC1562 equivalent at half as much bandwidth). THD in a 1VRMS output (2.8VP-P) was measured as -87dB at 50kHz and -72dB at 100kHz. 256kHz Phase-Linearized 6th Order Lowpass Filter Data communication and some signal antialiasing and reconstruction applications demand filters with controlled phase (or time-domain) CIN4 22pF 5% *V- ALSO AT PINS 4, 7, 14 & 17 ALL RESISTORS 1% METAL FILM Figure 5. 256kHz linear-phase 6th order lowpass filter responses. The circuit in Figure 5 realizes a root-raised-cosine lowpass gain response (Figure 6). For data communications, this filter's timedomain pulse response (Figure 7) approximates, in continuous time, the ideal Nyquist-type property of crossing zero at a time interval that is equal to 1/(2fC). When used as a pulse-shaping filter, this response has the special property of producing minimal intersymbol interference (ISI) among successive data pulses at a data rate of 2fC (512 kbits/second or ksymbols/second for Figure 5) while simultaneously limiting the transmitted spectrum to a bandwidth approaching the theoretical minimum, which is fC.5 Also, data or signal acquisition (before A/D conversion) or reconstruction (after D/A conversion) can benefit from the linear-phase (that is, constant-group-delay) response (typically 300ns group delay variation over the passband from 0 to fC, evident in Figure 8). The filter in Figure 5 achieves these properties by preceding a 6th order lowpass section (the C, A, and D quarters of the LTC1562-2 chip, in that sequence) with a 2nd order allpass response to linearize the phase. This combination illustrates two practical uses of the virtual-ground inputs in the LTC1562-2. Combining two feedforward paths (RFF1 from the input and RB1 from a bandpass section in the "B" quarter of the LTC1562-2) yields the allpass equalization. Subsequently, RIN4 and CIN4 sum together two signals with 90 phase difference from the two outputs of the "A" quarter, with an additional 90 phase difference caused by the capacitor, to achieve a stopband notch at a desired frequency.4 Figure 5 operates from a single supply voltage from 5V to 10V (the AGND pin furnishes a built-in 10 8 0 7 INPUT 1V/DIV -10 6 DELAY (s) -20 GAIN (dB) VOUT RIN4 4.12k RIN3 4.12k -30 -40 OUTPUT (INVERTED) 200mV/DIV -50 5 4 3 2 -60 1 -70 0 -80 10k 100k FREQUENCY (Hz) 1M Figure 6. Gain response of Figure 5's circuit Linear Technology Magazine * February 1999 1.953s/DIV (= 1/512kHz) 50 100 150 200 250 300 350 400 FREQUENCY (kHz) Figure 7. Time-domain response of Figure 5's circuit Figure 8. Group delay response of Figure 5's circuit 9 DESIGN FEATURES 10 CIN2 82pF 0 RIN2 20.5k CIN3 47pF -10 VIN 1 RQ1 9.09k 2 R21 7.15k 5V 3 R23 11.3k RQ3 59k INV C V1 B V1 C V2 B V2 C 20 RIN3 45.3k 19 RQ2 26.7k 18 R22 10k -30 -40 -50 -60 LTC1562-2 V- 16 20-PIN 15 6 SHDN SSOP AGND 13 8 V2 A V2 D 12 9 V1 A V1 D 11 10 INV A INV D 5 0.1F INV B GAIN (dB) -20 CIN1 220pF V+ -70 -5V* 0.1F -80 R24 4.02k -90 50k RQ4 3.24k VOUT RIN4 40.2k 200k FREQUENCY (Hz) 900k Figure 10. Frequency response of Figure 9's circuit CIN4 100pF *V- ALSO AT PINS 4, 7, 14 AND 17 ALL RESISTORS 1% METAL FILM ALL CAPACITORS 5% STANDARD VALUES Figure 9. 175kHz 8th order elliptic highpass filter half-supply ground reference) and exhibits -80dB THD at 50kHz for a 500mVRMS output with a 5V supply. 175kHz 8th Order Elliptic Highpass Filter In Figure 9, three response notches below the cutoff frequency suppress the stopband and permit a narrow transition band in a 175kHz highpass filter, whose measured frequency response appears in Figure 10. Each notch is produced by summing two 180-different currents into a virtualground "INV" summing input, one current passing through an RIN and the other (from a voltage 90 different RIN2A 1.43k C1 1000pF 5% RQ1 6.19k 2 R21 2k 3 RQ3 6.19k VIN2 INV B INV C V1 B V1 C V2 B V2 C V+ 6 R23 2k RIN3A 1.43k RIN2B 576 RIN3B 576 C3 1000pF 5% continued on page 35 VOUT1 20 19 RQ2 2.26k 18 R22 2k 16 LTC1562-2 V- 20-PIN 15 SHDN SSOP AGND R24 2k 13 8 V2 A V2 D 12 RQ4 2.26k 9 V1 A V1 D 11 10 INV A INV D 5 0.1F Although it is outside the 300kHz f0 limit recommended for best accuracy, this dual 6th order 400kHz Butterworth lowpass filter (Figure 11) illustrates an extreme of bandwidth available from the LTC1562-2 with some compromises. The high f 0 requires unusually small resistor val- 10 0 RIN4B 576 -30 -50 -60 C4 1000pF 5% *V- ALSO AT PINS 4, 7, 14 & 17 ALL RESISTORS 1% METAL FILM Figure 11. 400kHz dual 6th order Butterworth lowpass filter 10 -20 -40 VOUT2 RIN4A 1.43k -10 -5V* 0.1F GAIN (dB) RIN1B 576 1 5V 400kHz Dual 6th Order Lowpass Filter C2 1000pF 5% VIN1 RIN1A 1.43k from the first) through a CIN.4 This circuit exhibits only 44VRMS of output noise over a 1MHz bandwidth and THD of -70dB with a 200kHz signal, 0.5VP-P output, operating from a 5V total supply. ues, resulting in heavier loading and an increase in distortion from the LTC1562-2; it was also necessary to adjust the RQ resistors in Figure 11 downwards to correct for Q enhancement encountered when the designed f0 is very high. The circuit of Figure 11 supplements the eight poles of filtering in the LTC1562-2 by driving all four of the virtual-ground INV inputs from R-C-R "T" networks (in place of resistors) and thus obtaining additional real poles (a method described in the original LTC1562 application article1 and data sheet). Two such real poles replace the Q = 0.518 pole pair of a conventional 6th order Butterworth pole configuration, to good accuracy. The measured frequency response of one 6th order section appears in Figure 12. With 5V power, this circuit permits rail-to-rail inputs and outputs and exhibits THD, at 1VRMS (2.8VP-P) output, of -92dB at 50kHz and -79dB at 100kHz. Output noise 1M 100k FREQUENCY (Hz) Figure 12. Frequency response of Figure 11's circuit Linear Technology Magazine * February 1999 DESIGN FEATURES SOT-23 Switching Regulators Deliver Low Noise Outputs in a Small Footprint by Steve Pietkiewicz Introduction L1 4.7H 100 90 EFFICIENCY (%) As portable electronics designers continue to press for reduction in component sizes, Linear Technology introduces the LT1611 and LT1613 SOT-23 switching regulators. These current mode, constant frequency devices contain internal 36V switches capable of generating output power in the range of 400mW to 2W, in a 5lead SOT-23 package. The LT1613 has a standard positive feedback pin and is designed to regulate positive voltages. The LT1611 has a novel feedback scheme designed to directly regulate negative output voltages without the use of level-shifting circuitry. Boost, single-ended primary inductance converters (SEPIC) and inverting configurations are possible with the LT1613 and LT1611. The high voltage switch allows hard-todo, yet popular DC/DC converter functions like four cells to 5V, 5V to -5V, 5V to -15V or 5V to 15V to be easily realized. Both devices switch at a frequency of 1.4MHz, allowing the use of tiny inductors and capacitors. Many of the components specified for use with the LT1613 and LT1611 are 2mm or less in height, providing a low profile solution. The input voltage range is 1V to 10V, with 2mA quiescent current. In shutdown mode, the quiescent current drops to 0.5A. The VIN C1 15F SHDN VIN = 2.8V VIN = 1.5V 50 0 50 100 150 200 250 300 350 400 LOAD CURRENT (mA) TA01a Figure 2. Efficiency of Figure 1's1613boost converter constant frequency switching produces low amplitude output ripple that is easy to filter, unlike the low frequency ripple typical of pulseskipping or PFM type converters. Internally compensated current mode control provides good transient response. LT1613 Boost Converter Provides a 5V Output Figure 1's circuit details a boost converter that delivers 5V at 200mA from a 3.3V input. The input can range from 1.5V to 4.5V, making the circuit usable from a variety of input sources, such as a 2- or 3-cell battery, single Li-Ion cell or 3.3V supply. Efficiency, shown in Figure 2, reaches 88% from a 4.2V input. Start-up waveforms from a 3.3V input into a 47 load are LT1613 5V to 15V Boost Converter By changing the value of the resistive divider, a 15V supply can be generated in a similar manner to the 5V converter shown in Figure 1. Figure 4 depicts the converter. L1's value has been changed to 10H to provide the same di/dt slope with a higher input voltage. The converter delivers 15V at 60mA from a 5V input, at efficiencies up to 85%, as shown in the efficiency graph of Figure 5. LT1613 4-Cell to 5V SEPIC A 4-cell battery presents a unique challenge to the DC/DC converter designer. A fresh battery measures about 6.5V, above the 5V output, while at end of life the battery voltage will measure 3.5V, below the 5V output. Simple switching regulator topologies like boost or buck can only increase or decrease an input voltage, VOUT 5V/200mA R1 374k LT1613 + C2 15F VOUT 1V/DIV FB GND L1: MURATA LQH3C4R7M24 OR SUMIDA CD43-4R7 C1, C2: AVX TAJA156M010R D1: MOTOROLA MBR0520 VIN = 3.5V 70 D1 SW SHDN 80 60 VIN 3.3V + VIN = 4.2V pictured in Figure 3; the converter reaches regulation in approximately 250s. The device requires some bulk capacitance due to the internal compensation network used. A 10F ceramic output capacitor can be used with the addition of a phase-lead capacitor paralleled with R1; this capacitor is typically in the 10pF- 100pF range. R2 121k (814) 237-1431 (847) 956-0666 (803) 946-0362 (800) 441-2447 IL1 500mA/DIV 1613 * TA01 Figure 1. This boost converter steps up a 1.5V to 4.2V input to 5V. It can deliver 250mA from a 3.3V input. Linear Technology Magazine * February 1999 SHDN 5V/DIV 100s/DIV Figure 3. Boost converter start-up with 3.3V input into a 50 load 11 DESIGN FEATURES L1 10H + VOUT 15V/50mA VIN C1 15F SHDN R1 1.37M 1% + SW LT1613 SHDN 1nF L1: MURATA LQH3C100 C1: AVX TAJB226M016 C2: AVX TAJA475M025 D1: MOTOROLA MBR0520 EFFICIENCY (%) SW 1M SHDN (800) 441-2447 70 65 60 1613 * TA01 (800) 441-2447 Figure 6. This single-ended primary inductance converter (SEPIC) generates 5V from an input voltage above or below 5V. 200s, with a maximum perturbation under 200mV. The double trace of VOUT under load in Figure 8 is actually switching ripple at 1.4MHz caused by the ESR of output capacitor C2. A better (lower ESR) output capacitor will decrease the output ripple. 85 80 VIN = 6.5V 75 70 VIN = 3.6V 65 VIN = 5V 60 55 50 0 10 20 30 40 50 60 70 80 90 100 LOAD CURRENT (mA) 1611 TA02 Figure 5. Efficiency of Figure 4's circuit which will not do the trick in this situation. The solution is a SEPIC. A dual-winding inductor or two separate inductors are required to make this converter. Figure 6 details the circuit. A Sumida CLS62-150 15H dual inductor is specified in the application, although two 15H units can be used instead. Up to 125mA can be generated from a 3.6V input. Figure 7's graph shows converter efficiency, which peaks at 77%. Transient response with a 5mA to 105mA load step is pictured in Figure 8. The converter settles to final value inside LT1611 5V to -5V Inverting Converter 50 0 A low noise -5V output can be generated using an inverting topology with the LT1611. This circuit, shown in Figure 9, bears some similarity to the SEPIC described above, but the output is in series with the second inductor. This results in a very low noise output. The circuit can deliver -5V at up to 150mA from a 5V input, or up to 100mA from a 3V input. Efficiency, described in Figure 10, peaks at 75%. Figure 11 illustrates the start-up waveforms. During startup, the switch-current increases to approximately 1A. At this current, the inductance of the Sumida unit decreases, resulting in the increased VOUT 100mV/DIV AC COUPLED 1611 TA02 ripple current noticeable in the switchcurrent trace of Figure 11. After the circuit has reached regulation, the ripple current decreases by about a factor of two. Switching waveforms with a 100mA load are shown in Figure 12. Output voltage ripple is caused by ripple current in the inductor multiplied by output capacitor ESR. Although the 20mVP-P ripple pictured in Figure 12 is low, significant improvement can be obtained by judicious component selection. Figure 13 details the same 5 to -5V C3 0.22F L1A 22H + VIN C1 22F SHDN 25 50 75 100 125 150 175 200 225 250 LOAD CURRENT (mA) Figure 7. Efficiency of Figure 6's SEPIC reaches 77%. VIN 5V L1B 22H SW D1 LT1611 29.4k SHDN VOUT -5V/150mA NFB GND 10k + 105mA 5mA 200s/DIV Figure 8. SEPIC transient response at 5V input with a 5mA to 105mA load step 12 C2 15F (847) 956-0666 (803) 946-0362 55 ILOAD VOUT 5V/175mA + 324k L1: SUMIDA CLS62-150 15H C1, C2: AVX TAJA156M016 C3: X7R CERAMIC D1: MOTOROLA MBR0520 1613 * TA01 VIN = 5V FB GND (814) 237-1431 (803) 946-0362 D1 L1B 15H LT1613 R2 121k VIN = 6.5V VIN = 3.6V VIN C1 15F SHDN 85 75 + C2 22F Figure 4. This 4-cell to 15V boost converter can deliver 50mA from a 3V input. 80 VIN 4V-7V FB GND C3 0.22F L1A 15H D1 EFFICIENCY (%) VIN 3V-7V L1: SUMIDA CLS62-220 22H C1, C2: AVX TAJB226010 C3: X7R CERAMIC D1: MOTOROLA MBR0520 C2 22F (847) 956-0666 (803) 946-0362 1613 * TA01 (800) 441-2447 Figure 9. This inverting converter delivers -5V at 150mA from a 5V input. Linear Technology Magazine * February 1999 DESIGN FEATURES 85 80 VOUT 2V/DIV VIN = 5V EFFICIENCY (%) 75 70 VIN = 3V ISW 500mA/DIV 65 60 55 VSHDN 5V/DIV 50 0 25 50 75 100 LOAD CURRENT (mA) 125 150 200s/DIV Figure 11. 5V to -5V inverting converter start-up into a 47 load 1611 TA02 Figure 10. 5V to -5V inverting converter efficiency reaches 76%. VOUT 200mV/DIV AC COUPLED converter function with better output capacitors. Now, output ripple measures just 4mV P-P. Additionally, transient response is improved by the addition of phase lead capacitor C5. Figure 14 depicts load transient response of a 25mA to 125mA load step. Maximum perturbation is under 30mV and the converter reaches final value in approximately 250s. It is important to take notice of how Figures 9 and 13 are drawn. D1's cathode is returned to the LT1611's GND pin before both connect to the ground plane. This connection combines the current of the switch and diode, which conduct on alternate phases. The summation of both currents equals a current with no abrupt changes, minimizing di/dt induced voltages caused by the few nanohenries of inductance in the ground plane. This summed current is then depos- ISW 100mA/DIV VSW 10V/DIV 100ns/DIV Figure 12. Switching waveforms of inverting converter with 100mA load ited into the ground plane. If this technique is not followed, 100mV spikes can appear at the converter output (I speak from experience: my first several breadboards had this problem). Many systems, such as personal computers, have a 12V supply available. Although the LT1611 VIN pin 5V OR 12V (SEE TEXT) has a 10V maximum, the 36V switch allows a 12V supply to be used for the inductor while the LT1611's VIN pin is still driven from 5V, as indicated in Figure 13. Significantly more output power can be obtained in this manner, as illustrated in the efficiency graph of Figure 15. continued on page 23 L1A 22H C2 0.22F VIN 5V D1 VIN C1 22F SHDN SW LT1611 SHDN VOUT -5V/150mA 29.4k C5 2.2nF NFB GND 10k C3 4.7F + + L1B 22H VOUT 20mV/DIV AC COUPLED C4 68F ILOAD L1: SUMIDA CLS62-220 22H C1: AVX TAJB226010 C2: X7R CERAMIC C3: Y5V CERAMIC C4: SANYO POSCAP 10TPC68M D1: MOTOROLA MBR0520 (847) 956-0666 (803) 946-0362 125mA 25mA 1613 * TA01 (619) 661-6835 (800) 441-2447 Figure 13. Low noise inverting converter; component selection and feedforward capacitor C5 reduce noise to 4mVP-P. Linear Technology Magazine * February 1999 200s/DIV Figure 14. Transient response of low noise inverting converter is under 30mV for a 25mA to 125mA load step. Steady-state output ripple is 4mVP-P. 13 DESIGN FEATURES Versatile New Switching Regulator by Craig Varga Fits in SO-8 Introduction Linear Technology recently introduced the LTC1530 synchronous buck regulator controller. Although packaged in an 8-pin SO, it has proven to be remarkably capable and versatile. The part is loosely based on the popular LTC1430, but with numerous enhancements. Features include current limiting that senses the voltage across the RDS(ON) of the high-side MOSFET (no sense resistor required), built in soft-start, 1% accurate reference, gate drivers capable of handling large MOSFETs, and micropower shutdown. The error amplifier transconductance is higher than that of previous generation parts and is trimmed for accuracy and stabilized over temperature. The IMAX current, which programs current limit, has a positive temperature coefficient to Instead of the traditional current sense resistor, the LTC1530 relies on the RDS(ON) of the high-side MOSFET as its source of load current information. This saves the space, cost and the power dissipation of an additional resistor in the power path. The programming current (IMAX) has a positive temperature coefficient that approximates the positive TC of a MOSFET's RDS(ON). This tends to flatten the current-limit trip point as a function of temperature. In a slight overload, the LTC1530 provides "square current limiting." In other words, the regulator starts to look like a current source. In the event of a significant overload, should the output fall to less than one-half of the nominal output voltage, the soft-start capacitor will be discharged very quickly. This forces help cancel the positive temperature coefficient of the MOSFET's RDS(ON). This allows for more consistent current limit over temperature. Although intended primarily for buck regulator designs, the part has been successfully designed into boost, positive-tonegative and negative-to-positive converters. A Quick Look at the Insides Figure 1 is the basic block diagram. The LTC1530 is a voltage mode control, synchronous buck regulator controller. An on-chip oscillator generates a 300kHz ramp waveform. The output of the error amplifier is compared to this ramp by the PWM comparator. So far, nothing extraordinary. Current-limit circuitry, however, is a little more unusual. DISDR LOGIC AND THERMAL SHUTDOWN INTERNAL OSCILLATOR 1 PVCC POWER DOWN 8 G1 - ICOMP PWM 7 G2 + COMP 4 ISS MSS CSS gm = 2m ERR + MAX MIN - - + + - FB VREF VREF - 3% FB - 6 IFB VSENSE 3 VOUT FOR FIXED VOLTAGE VERSIONS CC + 3 VREF + 3% 5 IMAX IMAX MHCL HCL* MONO + LVC - VREF /2 VREF VREF - 3% VREF + 3% VREF /2 VREF 1530 BD *HCL = HARD CURRENT LIMIT Figure 1. LTC1530 block diagram 14 Linear Technology Magazine * February 1999 DESIGN FEATURES OPTIONAL, INSTALL IF NO 12V D2 BAT54S 12V C1 1F 16V VIN 5V C4 1F 16V + C11 4.7F, 16V KEMET Ta + C12 0.22F R4 750 C2-C3 330F, 6.3V KEMET Ta x2 C5 68pF 1 4 C6 1800pF 2 R5 10k Q3 2N7002 3 LTC1530S8 PVCC IMAX COMP G1 VFB IFB GND G2 5 8 6 Q1 IRF7805 7 R3 100 L1 3.5H ETQP6F3R5SFA Q2 IRF7805 D1 MBRS130T3 R10 10k C7 270pF R1 16.5k 1% VREF = 1.233V R6 R2 R8 R9 1.0 R7 75k 68.1k 20.5k 11.3k + 1% 1% 1% 1% 3.3V 2.5V 1.5V 1.8V C13 2200pF JP1 JP2 JP3 VOUT 1.5V, 1.8V, 2.5V OR 3.3V AT 6A C8-C10 330F 6.3V KEMET Ta x3 ON/OFF Figure 2. 6A buck regulator; output voltage is jumper selectable for 1.5V, 1.8V, 2.5V or 3.3V. the regulator into shutdown for a period of time, typically a few milliseconds. After the time delay, the supply attempts to restart. If the overload still exists, the hiccup mode operation will continue. Once the short is removed, the regulator will start normally. Unlike its predecessor, the LTC1530's soft-start capacitor is internal. The start-up rise time was chosen to satisfy the vast majority of application requirements. Turn on is clean, well controlled and monotonic. Since dynamic performance is of extreme importance in many of today's systems, the LTC1530 incorporates several features to provide improved response times to load transients. First are the min/max comparators. Figure 3. Output voltage at turn-on for Figure 2's circuit Linear Technology Magazine * February 1999 These are a pair of comparators that continuously monitor the output voltage. If the output is more than 3% on either side of nominal, the appropriate comparator forces the duty factor to maximum or zero in an attempt to restore the output to the correct level as quickly as possible. Eventually, the error amplifier and main feedback loop will catch up and force the output to settle nicely. The error amplifier is also an improvement over earlier designs. The transconductance and output impedance have both been increased substantially from the LTC1430 values. This has the effect of raising the DC open-loop gain of the amplifier, resulting in better line and load regulation. Transconductance is also trimmed to ensure accuracy. The result is more predictable and repeatable loop response. The amplifier gm is temperature compensated so loop gain stays nearly constant over temperature extremes. The LTC1530 also has a low power shutdown mode. If the Comp pin is pulled to ground with an open collector or open drain transistor, the LTC1530's quiescent current will drop to approximately 45A. Virtually all integrated circuits have some quirks that will get you in trouble if you don't pay attention. The LTC1530 is no exception. Care must be taken in choosing the power MOSFETs used in circuits that depend on a charge pump to supply gate-drive power. It is essential to select a FET for the upper device that will be almost fully enhanced before the PVCC supply voltage reaches 8V with whatever main input voltage happens to be available. Failure to heed this requirement can lead to a circuit that may not start up properly at all times. Standard logic-level FETs work fine. Be sure VTH is less than 2V in the worst case. The cause of this start-up phenomenon is related to the way the current limit circuit behaves. Below a PVCC level of 8V, current limit is disabled. Assume for the sake of this discussion that the main input supply is derived from 5V. At turn on, as the charge pump gradually pushes the PVCC supply upward, the currentlimit circuit wakes up at 8V on PVCC. If the 5V supply is exactly 5V, the gate drive available for the FET is only 3V (8V - 5V). If the FET's RDS(ON) is very high relative to its nominal value at this point, the current-limit circuit may activate in a misguided attempt to maintain control of the output current. If, at the same time, the output voltage has come up to less than onehalf of its final value, the LTC1530 will respond by discharging the soft15 DESIGN FEATURES D1 BAT54S + C12 1F 16V C11 4.7F 16V C11 0.1F C2, C3, C8-C10: PANASONIC SP TYPE (201) 348-7522 L1: GOWANDA 50-324 OR DALE IHLP2525 (SEE TEXT) VIN 5V + C4 1F 10V (716) 532-2234 (605) 665-1627 R4 750 C2-C3 47F, 6.3V x2 1 4 C5 4700pF C7 68pF 3 2 LTC1530S8 PVCC COMP VFB GND IMAX G1 IFB G2 5 8 6 Q1A Si4936DY 7 R5 100 R2 10k L1 4.7H VOUT 3.3V/3A C6 470pF Q1B Si4936DY VREF = 1.233V R1 16.9k 1% + R7 10k 1% C8-C10 56F 4V x3 Figure 4. 3.3V/3A regulator start capacitor and trying to initiate a restart. As long as the output voltage has reached a level of greater than onehalf of its final value before the PVCC voltage reaches 8V, the output will continue to rise in current limit. If the output is below this level, start-up is not ensured. If the PVCC supply is derived from a 12V source instead of charge pumped from the 5V supply, this problem cannot occur. A Few Circuit Examples The LTC1530 turns out to be a rather versatile device. Although intended as a buck regulator, the part has been successfully used in boost and buckboost designs. Figure 2 is a classic buck topology. The circuit was designed to handle approximately 6A while maintaining a low profile. Input and output capacitors are tantalum devices. The inductor is a very low DC resistance design for high efficiency. The input is 5V, while the output voltage can be jumper selected for 3.3V, 2.5V, 1.8V or 1.5V. The photo in Figure 3 shows the output voltage rise at turn on. A clean, monotonic rise is evident. Figure 4 is a 3A design that has a total height of less than 2.4mm. The inductor is a Gowanda part #50-324, which mounts through a hole in the PCB for a total height above the board of approximately 1.5mm. Output ripple voltage is approximately 10mVP-P at a 3A load with the specified Panasonic SP series output capacitors. There are several options for the main inductor. The overall smallest size available is an IHLP-2525 by Dale Electronics. It's 3mm tall but only 6.4mm on a side. Output ripple is about 50% higher with this inductor. Figure 5 is an example of a synchronous boost regulator. The input is 3.3V and the output is 5V. The circuit is rated for a maximum output current of 6A. Since the output curL1* 2.5H VIN 3.3V + C3 1F 16V C4 1F X7R 1 2 3 LTC1517-5 5 VIN C1- C1-C2 470F 16V x2 C6 0.22F 4 C1+ VOUT C9 1F X7R 4 C15 100pF C14 0.022F 3 2 D3 FMM914 + C12 10F 16V C13 1F 16V C5 0.22F D1 MBR0530 5 GND D2 MBR0530 RS1 (OPTIONAL, SEE TEXT) LTC1530S8 IMAX PVCC COMP G2 VFB IFB GND G1 L2** 10H 1 7 6 8 R1 12k Q2 IRF7801 VREF = 1.233V R2 71.5k 1% + + R3 23.2k 1% *L1: PULSE PE-53681 (619) 674-8100 **L2: COILCRAFT DS3316P-102 (847) 639-6400 VOUT 5V/6A Q1 IRF7801 C10 470F 6.3V C7, C8, C11 470F 6.3V x3 Figure 5. 5V/6A synchronous boost regulator 16 Linear Technology Magazine * February 1999 DESIGN FEATURES rent waveform is discontinuous, the output ripple is inherently large in any boost regulator. The second stage LC filter is added to clean things up a bit. The feedback divider connects to the output before the LC filter for a reason. If the divider is connected after the LC filter, the extra 180 of phase shift above the LC corner frequency will make the regulator's feedback loop unstable. The DC resistance of the inductor is small, so the effect on load regulation is minimal. The LTC1517 charge pump is used to generate a sufficiently high voltage for the LTC1530 to function correctly and also to ensure adequate gate drive for the power MOSFETs. It runs from the 3.3V input and delivers a regulated 5V output. Once the main output comes into regulation, charge pump power is derived through D2. This causes the LTC1517's regulated output voltage set-point to be exceeded and D3 back biases, shutting the LTC1517 down. Note that current limit is disabled in this design by grounding IMAX and connecting IFB to VIN. Since in the boost topology there is a direct DC path from input to output, there is no point in using the current limit feature except to protect against inductor saturation. It is also worth mentioning that the FET RDS(ON) cannot be used as the current sense resistor in this application because FET Q2's drain is not common to VIN. If inductor saturation protection is desirable, it is possible to install a small value current sense resistor between C2 and L1. Install an appropriate value resistor (RS1) between C2 and L1; connect the IMAX pin to the C2 side of RS1 (instead of ground) and connect IFB directly to the input side of L1. Just don't expect the circuit to limit current in the event of a short circuit. Figure 6 is a positive input to negative 5V output design. Since the LTC1530 needs to be referenced to the -5V output, the design requires external gate-drive circuitry for both the main and synchronous FETs. The absolute maximum voltage rating of the LTC1530's gate drive would be exceeded if the high-side gate were driven directly. Q3 and the associated parts at the input to the LTC1693 gate driver provide the required levelshift function. The synchronous FET is driven by the other half of the LTC1693. The driver is only required at this location to match the propagation delay of the high-side drive. Failure to pay attention to these details will result in severely degraded efficiency. Output currents of up to 4A can be obtained from this circuit. Like the boost regulator, the output currents are discontinuous, so ripple on the output is somewhat high. A small, second-stage LC filter can easily remedy this if desired. Conclusion The LTC1530 is a small, versatile controller that is usable in numerous topologies and over a wide range of power levels. In the basic buck applications for which it was designed, the LTC1530 permits the designer to realize very simple, low parts count designs that require minimal real estate. The part provides clean turnon and current-limit characteristics. With a little ingenuity, it is possible to develop circuits different than those that the part's designers intended, but which give excellent performance nonetheless. VIN 5V R8 470 1/4W C7 4.7F + R1 2.7k R3 1.3k C3 10F C4 0.1F LTC1530-ADJ 5 PVCC IMAX 4 8 COMP G1 3 6 VSENSE IFB 2 7 GND G2 R4 2.0k RC 4.7k Q1 Q3 D2 2N7002 MBR0530T1 1 C1 1000pF C2 27F 5 CIN 4 1/2 LTC1693-2 R9 1k Q4 2N3906 + 3 + Q2 R7 3.3 L1 2.5H C8 4.7F + CC 0.22F 1 8 7 COUT VOUT -5V/5A + + 6 D1 MBR0530T1 C6 0.1F R10 47 2 1/2 LTC1693-2 R5 2.96k D4 1N4148 D3 1N4148 + R6 1k C5 6.8F R2 100 L1: PANASONIC ETQP6F2R5FA (201) 348-7522 CIN: 3x SANYO 10MV1200GX COUT: 4x SANYO 6MV1500GX (619) 661-6835 Q1, Q2: SUD50N03-10 Figure 6. 5V to -5V/4A synchronous switching, inverting polarity converter Linear Technology Magazine * February 1999 17 DESIGN FEATURES 16-Bit Parallel DAC Has 1LSB Linearity, Ultralow Glitch and Accurate by Patrick Copley 4-Quadrant Resistors Today's fast paced marketplace has developed a major appetite for high resolution, high accuracy, fast digital-to-analog converters. System requirements in instrumentation, automatic test equipment, communications, waveform generation, data acquisition and feedback control systems, among many other applications, have fueled the need for 16-bit digitalto-analog converters. Not only does the converter need to meet the stringent speed and accuracy requirements of the system, it needs to do so in both unipolar (0V to 10V) and bipolar (10V) modes of operation without degradation. To meet and exceed these requirements, Linear Technology introduces its LTC1597 16-bit parallel, current output, low glitch, multiplying DAC with 4-quadrant resistors. Key features of the new DAC include: 1LSB maximum INL and DNL over the industrial temperature range On-chip 4-quadrant resistors allow precise 0V to 10V, 0V to -10V or 10V outputs Ultralow, < 1nV-s midscale glitch impulse Small 28-pin SSOP package Low supply power consumption: 10W typical Pin-compatible with the LTC1591 14-bit parallel, current output, low glitch, multiplying DAC with 4-quadrant resistors. Unique Features of the LTC1597 The LTC1597 operates from a single 5V supply and provides both unipolar 48k REF 0V to -10V or 0V to 10V and bipolar 10V output ranges from a 10V or -10V reference input using a single or dual external op amp. The device achieves bipolar operation using three additional on-chip precision resistors. The DAC consists of a precision thinfilm R/2R ladder for the thirteen LSBs. The three MSBs are decoded into seven segments of resistor value R, as shown in Figure 1. R is nominally 48k. Each of these segments and the R/2R ladder carry an equally weighted current of one-eight of full-scale. The feedback resistor, RFB, and 4-quadrant resistor, ROFS, have a value of R/ 4. 4-quadrant resistors R1 and R2 have a magnitude of R/4. The reference pin presents a constant input impedance of R/8 in unipolar mode and R/12 in bipolar mode. The output impedance of the current output pin, IOUT1, varies with DAC code. 48k 1 R2 12k RCOM 2 48k 48k 48k 48k 48k 48k 48k 96k 96k 96k 96k ROFS 12k RFB 12k 4 ROFS 5 RFB R1 12k R1 3 6 IOUT1 VCC 23 7 AGND DECODER LD 8 WR 9 LOAD 22 DGND D15 (MSB) D14 D12 D13 D11 *** DAC REGISTER D0 (LSB) RST INPUT REGISTER WR 28 CLR RST 1597 BD 10 11 D15 D14 **** 21 24 25 26 27 D4 D3 D2 D1 D0 Figure 1. The LTC1597 16-bit CMOS DAC uses a precision thin-film modified R/2R architecture to provide unsurpassed accuracy and stability. Accurate 4-quadrant multiplication applications are now possible with on-chip resistors R1, R2 and ROFS. A built-in deglitcher reduces glitch impulse to 1nV-s. 18 Linear Technology Magazine * February 1999 DESIGN FEATURES 1.0 16-Bit Accuracy Over Temperature INTEGRAL NONLINEARITY (LSB) 0.8 0.6 0.4 0.2 0 - 0.2 - 0.4 - 0.6 - 0.8 -1.0 0 49152 32768 16384 DIGITAL INPUT CODE 2a. 65535 1597 G01 DIFFERENTIAL NONLINEARITY (LSB) 1.0 0.8 0.6 0.4 0.2 0 - 0.2 - 0.4 - 0.6 - 0.8 -1.0 0 49152 32768 16384 DIGITAL INPUT CODE 65535 1597 G02 2b. Figure 2. The outstanding INL and DNL (typically less than 0.25LSB) and very low linearity drift allow a maximum 1LSB spec to be guaranteed over the industrial temperature range. An added feature of the LTC1597 is a proprietary deglitcher that reduces the glitch energy to below 1nV-s over the DAC's output voltage range. The LTC1597 has a 16-bit parallel input data bus and is double buffered with two 16-bit registers. The double buffered feature permits the updating of several DACs simultaneously. The WR signal updates the input register and the LD signal loads the DAC register. The deglitcher is activated on the rising edge of the LD signal. The versatility of the interface also allows the use of the input and DAC registers in a master/slave or edgetriggered configuration. This mode of operation occurs when WR and LD are tied together to act as a clock signal. The asynchronous clear pin (CLR) resets the LTC1597 to zero scale and the LTC1597-1 to midscale. CLR resets both the input and DAC registers. The LTC1597 also features a poweron reset. Linear Technology Magazine * February 1999 The LTC1597 has ultralow linearity drift of well below 0.2LSB from -45C to 85C. This allows the LTC1597 to hold its accuracy of 1LSB integral nonlinearity (INL) and differential nonlinearity (DNL) over time and temperature. In the past, the only DACs that approached this accuracy over temperature were of the autocalibrated type. These DACs were very large, very expensive and therefore not very practical for most applications. Figures 2a and 2b show the typical INL and DNL curves of the LTC1597. The outstanding 0.25LSB INL, 0.15 LSB DNL (typical) and very low drift allow a maximum 1LSB specification over the extended industrial temperature range. For optimum performance, the REF pin of the LTC1597 should be driven by a source impedance of less than 1k. However, the DAC has been designed to minimize source impedance effects. An 8k source impedance degrades both INL and DNL by a mere 0.2LSB. 5V LD PULSE 5V/DIV GATED SETTLING WAVEFORM 500V/DIV 500ns/DIV Figure 4. When used with the LT1468 and a 20pF feedback capacitor (see Figure 3), the LTC1597 can settle in an amazing 1.7s to within 0.0015%. The top trace shows the LD pulse; the bottom trace shows the gated settling waveform settling to 1LSB in 1.7s. Fast Settling: Less than 2s to within 0.0015% of Full-Scale Now system designers no longer have to make tough decisions in the tradeoff between accuracy and speed. The solution is here. The combination of the LTC1597 DAC and the LT1468 op amp provides an industry first: superb 16-bit settling of less than 2s for a 10V step while maintaining 1LSB DC accuracy. Figure 3 shows the application circuit for unipolar mode. Figure 4 shows the resulting full-scale 10V step settling time of the LTC1597/LT1468 combination. With a 20pF feedback capacitor, the optimized settling time to 0.0015% is an amazing 1.7s. A 0.1F VREF 2 3 R1 1 REF RCOM R1 23 VCC 4 5 ROFS RFB ROFS R2 20pF RFB IOUT1 16 DATA INPUTS LTC1597 - 6 16-BIT DAC AGND 10 TO 21, 24 TO 27 DGND 7 + LT1468 VOUT = 0V TO -VREF 22 WR LD CLR WR LD CLR 9 8 28 Unipolar Binary Code Table DIGITAL INPUT BINARY NUMBER IN DAC REGISTER LSB MSB 1111 1000 0000 0000 ANALOG OUTPUT VOUT 1111 0000 0000 0000 1111 0000 0000 0000 1111 0000 0001 0000 -VREF (65,535/65,536) -VREF (32,768/65,536) = -VREF/2 -VREF (1/65,536) 0V 1591/97 F01b Figure 3. With a single external op amp, the LTC1597 performs 2-quadrant multiplication with 10V input and 0V to -VREF output. With a fixed -10V reference, it provides a precision 0V to 10V unipolar output. 19 DESIGN FEATURES - 50 - 60 - 70 - 80 500kHz FILTER - 90 80kHz FILTER -100 30kHz FILTER -110 10 100 1k 10k FREQUENCY (Hz) - 50 - 40 VCC = 5V USING TWO LT1468s CFEEDBACK = 15pF REFERENCE = 6VRMS - 60 - 70 - 80 500kHz FILTER - 90 -100 80kHz FILTER 10 100 - 60 - 70 - 80 500kHz FILTER - 90 80kHz FILTER -100 -110 1k 10k FREQUENCY (Hz) 1591/97 G03 VCC = 5V USING TWO LT1468s CFEEDBACK = 15pF REFERENCE = 6VRMS - 50 30kHz FILTER 30kHz FILTER -110 100k 6a. Unipolar-mode full-scale: the noise and distortion (N + D) is less than -96dB for signal frequencies up to 30kHz. Out to 100kHz, the N + D is less than -78dB. SIGNAL/(NOISE + DISTORTION) (dB) - 40 VCC = 5V USING AN LT1468 CFEEDBACK = 30pF REFERENCE = 6VRMS SIGNAL/(NOISE + DISTORTION) (dB) SIGNAL/(NOISE + DISTORTION) (dB) - 40 10 100k 100 1k 10k FREQUENCY (Hz) 100k 1591/97 G05 1591/97 G04 6b. Bipolar-mode zero-scale: the N + D is less than -96dB for signal frequencies up to 30kHz. Out to 100kHz, the N + D is less than -82dB. 6c. Bipolar-mode full-scale: the (N + D) is less than -96dB for signal frequencies up to 30kHz. Out to 100kHz, the N + D is less than -79dB. Figure 6. LTC1597 multiplying-mode signal-to-noise vs frequency detailed discussion of 16-bit settling time can be found in Linear Technology Application Note 74, "Component and Measurement Advances Ensure 16-Bit DAC Settling Time." The ability to minimize settling time is limited by the need to null the DAC output capacitance, which varies from 70pF to 115pF, depending on code. This capacitance at the amplifier input combines with the feedback resistor to form a zero in the closed-loop frequency response in the vicinity of 200kHz-400kHz. Without a feedback capacitor, the circuit will oscillate. The choice of 20pF stabilizes the circuit by adding a pole at 1.3MHz to limit the frequency peaking and also optimizes settling time. The settling time to 16-bit accuracy is theoretically bounded by 11.1 time constants set by the feedback resistance and capacitance. OUTPUT VOLTAGE (mV) +10 Glitches in a DAC's output when it updates can be a big problem in precision applications. Usually, the worst-case glitch occurs when the DAC output crosses midscale. The LTC1597's new proprietary deglitcher reduces the output glitch impulse to 1nV-s, which is at least ten times lower than any of the competition's 16-bit voltage output DACs. In addition, the deglitcher makes the glitch impulse uniform for any code. Figure 5 shows the output glitch for a midscale transition with a 0V to 10V output range. Unipolar 0V to 10V Outputs with a Single Op Amp Figure 3 shows the circuit for a 0V to 10V output range. The DAC uses an external reference and a single op amp in this configuration. This circuit can also perform 2-quadrant multiplication where the REF pin is driven by a 10V AC input signal and VOUT swings from 0V to -VREF. VREF + 5V 0.1F 1/2 LT1112 - 2 3 R1 1 REF RCOM R1 5 23 4 VCC ROFS ROFS R2 RFB 33pF RFB IOUT1 16 DATA INPUTS LTC1597-1 - 6 1/2 LT1112 16-BIT DAC AGND 10 TO 21, 24 TO 27 COMPETITOR'S DAC DGND 7 + VOUT = -VREF TO VREF 22 WR LD CLR WR LD CLR 0 1nV-s TYP LTC1597 -10 9 8 28 Bipolar Offset Binary Code Table DIGITAL INPUT BINARY NUMBER IN DAC REGISTER 1 2 TIME (s) 3 4 03 .eps Figure 5. The proprietary deglitcher 1595 reduces the output glitch to less than 1nV-s, which is ten times less than any other 16-bit, voltageoutput DAC. Further, the deglitcher makes the glitch uniform, independent of code. 1111 1000 1000 0111 0000 ANALOG OUTPUT VOUT LSB MSB 0 20 Ultralow 1nV-s Glitch 1111 0000 0000 1111 0000 1111 0000 0000 1111 0000 1111 0001 0000 1111 0000 VREF (32,767/32,768) VREF (1/32,768) 0V -VREF (1/32,768) -VREF 1591/97 F02b Figure 7. With a dual op amp, the LTC1597 performs 4-quadrant multiplication. With a fixed 10V reference, it provides a 10V bipolar output. For fast bipolar settling applications, an LT1468 can be used for the output amplifier. Linear Technology Magazine * February 1999 DESIGN FEATURES Bipolar 10V Output with Two Op Amps 0.92LSB (140V) at 17 bits for room temperature. The circuit uses the LTC1597 in its unipolar mode with the reference input inverted (-VREF, by means of R1 and R2 and an external op amp) for the output voltage range 0V to VREF. When the sign bit changes, the analog switch changes the reference input polarity to noninverting (VREF) for the output range 0V to -VREF. modes of operation. For AC signals less than 40kHz, the THD+noise is superb (better than 90dB) and is still very good out to 100kHz (78dB). Filtering at the output of the LT1468 is necessary to reduce the noise bandwidth to acceptable levels. The wider the bandwidth, the higher the noise floor. The LTC1597 contains all the 4-quadrant resistors necessary for bipolar operation. For a fixed 10V reference, the circuit shown in Figure 7 gives a precision -10V to 10V output swing, with a minimum of external components: a feedback capacitor and a dual op amp. The bipolar zero error is 8LSB maximum over temperature. If two LT1468 op amps are used instead of the LT1112, the circuit can perform wider bandwidth 4-quadrant multiplication, where the reference input is driven by a 10V AC input signal and VOUT swings 10V . Figure 6 shows a graph of the multiplying mode total harmonic distortion and noise of the LTC1597/LT1468 combination in both unipolar and bipolar 17-Bit Sign Magnitude DAC Gives Perfect Bipolar Zero Figure 8 shows a novel application of the LTC1597, a 17-bit sign magnitude DAC, and the resulting output coding. This circuit has an extremely accurate bipolar zero error, which is the offset voltage of the current-tovoltage op amp plus the bias current times the DAC feedback resistor. For the LT1468, this corresponds to a maximum bipolar zero error of 16 94dB SFDR Digital Sine Wave Generator Figure 9 shows the circuit diagram for a variable frequency digital waveform generator. The circuit shows the bipolar configuration for the LTC1597 but the unipolar configuration will work just as well. For a sampling frequency of 50kHz and an output sine wave frequency of 1kHz, the second harmonic distortion is -94dB and the third harmonic is -101dB. The on-chip deglitcher circuit minimizes the code-dependent glitch (which 14 15 Bipolar Sign Magnitude Code Table LTC203AC DIGITAL INPUT BINARY NUMBER IN DAC REGISTER LSB SIGN MSB 1 2 15V LTC1236A-10 2 1111 0000 0000 0000 0000 1111 1 1 1 0 0 0 3 6 VREF ANALOG OUTPUT VOUT 1111 0000 0000 0000 0000 1111 1111 0000 0000 0000 0000 1111 1111 0001 0000 0000 0001 1111 VREF (65,535/65,536) VREF (1/65,536) 0V 0V -VREF (1/65,536) -VREF (65,535/65,536) + 4 5V LT1468 - 0.1F 15pF 3 R1 2 RCOM 1 REF 5 RFB 23 4 ROFS SIGN BIT 20pF R2 R1 ROFS RFB LTC1597 10 T0 21 24 TO 27 - 6 I0UT 16 DATA INPUTS 16-BIT DAC AGND 7 + LT1468 VOUT 22 DGND WR LD CLR 9 8 28 WR LD CLR Figure 8. This 17-bit sign-magnitude DAC uses the LTC1597 in its unipolar mode with the reference bit inverted (-VREF) for the output range 0V to VREF. When the sign bit changes, the analog switch changes the reference input polarity to noninverting (VREF) for the output range 0V to -VREF. The resulting circuit produces an impressive bipolar zero error of 140V (0.92LSB) max at room temperature--less than 1LSB at 17 bits. Linear Technology Magazine * February 1999 21 DESIGN FEATURES 2 LTC1236A-10 15V 10V 6 + 4 5V LT1001 0.1F - 3 R1 n = 24-32 BITS SERIAL OR PARALLEL DATA INPUT n 1 REF 5 RFB 23 4 ROFS 15pF n SERIAL OR BYTE LOAD REGISTER 2 RCOM R2 R1 ROFS RFB PHASE ACCUMULATOR PARALLEL n DELTA PHASE REGISTER M n n PHASE REGISTER CLOCK FREQUENCY CONTROL PHASE TRUNCATION 16 BITS LTC1597 16-BIT DAC AGND 10 T0 21 24 TO 27 - 6 I0UT n SINE ROM 16 DATA LOOKUP INPUTS TABLE + 7 LOWPASS FILTER LT1468 22 fO = DGND M * fC 2n WR LD CLR 9 8 28 fC CLR Figure 9. This digital waveform generator produces a 1kHz sine wave with a second harmonic distortion of -94dB. The sampling frequency is 50kHz. BIPOLAR MODE DAC OUTPUT ERROR DAC OUTPUT ERROR UNIPOLAR MODE DAC TRANSFER CURVE WITH VOS IN CURRENT-TO-VOLTAGE OP AMP DAC TRANSFER CURVE WITH VOS IN CURRENT-TO-VOLTAGE OP AMP AND REF INVERTING OP AMP GAIN ERROR = 2VOSI-to-V + 4VOSINV GAIN ERROR = VOSI-to-V DAC TRANSFER CURVE WITH IDEAL OP AMP OFFSET ERROR = VOSI-to-V 0 NEGATIVE FULL-SCALE ERROR = 2VOSI-to-V 65,535 32,768 CODE BIPOLAR ZERO ERROR = 3VOSI-to-V + 2VOSINV DAC TRANSFER CURVE WITH IDEAL OP AMP 32,768 CODE 0 65,535 1720 G01 1720 G01 Figure 10. The effect of op amp offset on the LTC1597 gain and offset errors in unipolar mode (left) and bipolar mode (right); op amp offset has virtually no effect on DAC linearity; it merely shifts the end points. Table 1. Amplifiers recommended for use with the LTC1597, with relevant specifications Amplifier Specifications Amplifier VOS V IB nA AOL V/mV Voltage Noise nV/ Hz LT1001 25 2 800 10 0.12 LT1097 50 0.35 1000 14 LT1112 (dual) 60 0.25 1500 LT1124 (dual) 70 20 LT1468 75 10 22 Gain Bandwidth Product MHz Power Dissipation mW 0.25 0.8 46 0.008 0.2 0.7 11 14 0.008 0.16 0.75 10.5/op amp 4000 2.7 0.3 4.5 12.5 69/op amp 5000 5 0.6 22 90 117 Current Noise Slew Rate pA/ Hz V/s Linear Technology Magazine * February 1999 DESIGN FEATURES causes distortion) by making the glitch impulse both ultralow and uniform with code. Op Amp Selection Considerations A significant advantage of the LTC1597 is the ability to choose the I-to-V output op amp to optimize system accuracy, speed, power and cost. Table 1 shows a sampling of op amps and their relevant specifications for this application. The LTC1597 is designed to minimize the sensitivity of INL and DNL to op amp offset; this sensitivity has been greatly reduced compared to that of competing multiplying DACs. Figure 10 summarizes the effects of op amp offset for both modes of operation. Note that the bipolar LSB size is twice its unipolar counterpart. As Figure 10 shows, op amp offset has a minimal effect on DAC linearity; it merely shifts the end points. LT1611/LT1613, continued from page 13 The amplifier's input bias current, which flows through the feedback resistor, adds to the output offset voltage. The amplifier's finite DC openloop gain also degrades accuracy. The DAC gain error is inversely proportional to the open-loop gain and feedback factor of the op amp. In unipolar mode at full-scale the feedback factor is 0.5; for a 0.2LSB of gain error (REF = 10V) at 16 bits, the openloop amplifier gain should be greater than 650,000. The op amp's input voltage and current noise also limit DC accuracy. Noise effects accuracy similarly to voltage and current offsets and adds in an RMS fashion. As with any precision application, and with wide bandwidth amplifiers in particular, the noise bandwidth should be minimized with a filter on the output of the op amp to maximize resolution. VIN 80 + SHDN 70 Wherever system requirements demand true 16-bit accuracy over temperature, the LTC1597 provides the best solution. The LTC1597 has outstanding 1LSB linearity over temperature, ultralow glitch impulse, on-chip 4-quadrant resistors, low power consumption, asynchronous clear and a versatile parallel interface.Combined with the LT1468 op amp, the LTC1597 provides the best in its class, 1.7s settling time to 0.0015%, while maintaining superb DC linearity specifications. SW D1 L1B 15H LT1611 68.1k SHDN VOUT -10V/60mA NFB GND 10k 65 + EFFICIENCY (%) 75 C1 22F Conclusion: C2 0.22F L1A 15H VIN 3.6V-7V 85 Referring to Table 1, the LT1001 provides excellent DC precision, low noise and low power dissipation. The LT1468 provides the optimum solution for applications requiring DC precision, low noise and fast 16-bit settling. C3 6.8F 60 55 50 0 50 100 150 200 250 LOAD CURRENT (mA) 300 350 1611 TA02 Figure 15. 12V supply at L1A increases efficiency to 81% and output current to 350mA. 85 VIN = 6.5V EFFICIENCY (%) 75 VIN = 3.6V (847) 956-0666 (803) 946-0362 1613 * TA01 (800) 441-2447 Figure 16. 4-Cell to -10V inverting converter delivers 75mA from a 4V input. LT1611 4-Cell to -10V Inverting Converter A -10V low noise output can be generated in a similar manner as the -5V circuit described above. Figure 16's circuit can deliver -10V at up to 60mA from a 3.6V input. Efficiency, graphed in Figure 17, reaches a high of 78%. 80 70 L1: SUMIDA CL562-150 C1: AVX TAJB226M010 C2: X7R CERAMIC C3: AVX TAJA685M016 D1: MOTOROLA MBR0520 VIN = 5V 65 60 Conclusion 55 The flexibility of individually controlled outputs in multiple-supply applications can make several LT1611/ LT1613 converters attractive compared to a multiple-output flyback 50 0 25 50 75 100 LOAD CURRENT (mA) 125 150 1611 TA02 Figure 17. 4-cell to -10V converter efficiency Linear Technology Magazine * February 1999 design with one large switching regulator and a custom transformer. Changing an output voltage on a multiple output flyback requires changing the transformer turns ratio, hardly a simple task. Conversely, individual control of each output, using the multiple LT1611/LT1613 approach, provides for complete control of each output voltage as well as supply sequencing. The LT1611 and LT1613 SOT-23 switchers provide small, low noise solutions to power generation needs in tight spaces. 23 DESIGN FEATURES Fast Rate Li-Ion Battery Charger by Goran Perica Introduction The recent trend in notebook computers has been toward increasing battery operating time and faster processor speeds. These two requirements, in conjunction with a need for faster battery recharging (1-2 hours) have placed a strain on battery charging circuits and wall adapters. A typical notebook computer system configuration is shown in Figure 1. Wall adapters are typically AC/DC converters with a 20V output at 3A-4A of load current. When a notebook computer is running, all of the available current from the wall adapter may be consumed by the system, with no power left for charging the battery. However, as soon as the system's power requirements drop below the wall adapter's current limit, the battery charging can resume. In order to recharge the battery in the shortest time possible, the recharging should start as soon as there is any current left over from the system. The ideal situation is when the sum of battery charging current and the system current is just below the wall adapter's current limit: IIN_MAX > ISYS + ICHARGER where IIN_MAX is the wall adapter current limit, ISYS is the system load current and ICHARGER is the battery charger current. To achieve this objective, it is necessary to adjust the battery charger current so that the sum of the two currents is just below the maximum available input current, IIN_MAX. The INPUT FROM WALL ADAPTER LT1505 incorporates a patented battery charger input current limiting function along with other functions necessary to provide a complete, single-chip battery charging circuit solution. LT1505 Features The LT1505 is a constant-current (CC), constant-voltage (CV) current mode switching battery charger circuit with the following features: 0.5% voltage reference 5% output current regulation Output voltage is preset for 3 or 4 Li-Ion cells (12.3V, 12.6V, 16.4V and 16.8V) Output voltage is programmable from 1V to 21V Low VIN-to-VOUT operation (dropout <0.5V) Programmable AC wall adapter current limiting Programmable peak battery charging current Battery drain <10A in shutdown 94% efficiency Circuit Description The LT1505 is a synchronous buck converter using N-channel MOSFETs. The LT1505 operates at 200kHz and can be synchronized to an external clock with a frequency higher than 240kHz. The LT1505 IC has an undervoltage lockout circuit that detects the presence of an input power source and enables the battery charging. Once the undervoltage lockout has been exceeded, the PWM will start INPUT CURRENT SENSE LT1505 BATTERY CHARGER Li-Ion BATTERY Figure 1. Typical notebook computer power supply 24 SYSTEM LOAD running and the input MOSFET M3 is turned ON, thus reducing the voltage drop across its internal body diode DBODY (see Figure 2). The LT1505 monitors the current from the wall adapter and controls the battery charger current. For example, if a 3A, 20V wall adapter is used along with a 12.6V Li-Ion battery pack, the peak battery charging current, when the system is off, can be set to: IBATT MAX = x IIN_MAX x VIN/VBATT where IBATT MAX is the maximum battery charging current when the system is idle, is the efficiency of battery charger, VIN is the wall adapter output voltage and VBATT is the battery charging voltage. Assuming an efficiency of 90%, the above example could provide battery charging current in excess of 4A. The LT1505 will reduce the battery charging current as soon as the system current exceeds (IIN_MAX - ICHARGER). For example, if a 20V, 3A wall adapter is used and the system draws 2A from the adapter, the available current for charging the battery will be ICHARGER = 1A. The resulting battery charging current IBATT will be: IBATT = x ICHARGER x VIN/VBATT or IBATT = 0.9 x 1A x 20V/12.6V = 1.428A The input current from the wall adapter passes through a current sense resistor, RS4. One part of the input current goes to the system load and the remaining part goes to the LT1505 battery charger. The voltage drop across RS4 is monitored by a current comparator with a 90mV threshold. Once the threshold of 90mV is reached, the LT1505 will reduce the programmed battery charging current so that the peak input current does not exceed the preset limit. Thus, the maximum input current (IIN_MAX) will be: IIN_MAX = ISYSTEM + ICHARGER = 0.090V/RS4 Linear Technology Magazine * February 1999 DESIGN FEATURES VIN (FROM ADAPTER) DBODY TO SYSTEM POWER M3 Si4435 RS4 0.025 R7 475 C4 0.1F CIN 47F 35V C1 1F BOOST VCC BOOSTC GBIAS 100k R5 4.75k CLN TGATE CLP SW INFET L1 10H M1 Si4412 4.7 D4 MBRS140 3 CELL FLAG VFB CAP 4.2V COMP1 4.1V R1 1k C7 0.68F AGND RP1 330 SENSE 12.6V BATTERY RC1 1k RS2 200 1% CP1 1F RPROG 4.93k 1% RS3 200 1% CC1 0.33F PGND BAT2 BAT COUT 22F 25V x2 R2 22 C8 220pF PROG LT1505 SHDN RS1 0.025 VBAT M2 Si4412 VC SYNC C6 0.1F C2 1F D2 1N4148 BGATE UV R6 4.75k C3 4.7F D3 1N4148 NOTE: DBODY IS THE BODY DIODE OF M3 (619) 661-6835 CIN: SANYO OS-CON L1: SUMIDA CDRH127 (847) 956-0666 SPIN 1505 F01 Figure 2. 4A Li-Ion battery charger The battery charger in Figure 2 achieves high efficiency thanks to synchronous operation and input power FET. The efficiency is as high as 94%, as can be seen in Figure 4. PCB Layout When laying out the PCB, a multilayer layout with one of the inner layers as a solid ground plane is recommended. IBAT_MAX = (VPROG/RPROG) x (RS2/RS1) The LT1505 and low power compowhere VPROG is the reference voltage nents associated with it should be kept of 2.465V. The values in Figure 2 have as close together as possible. Additionbeen selected for a current limit ally, all power components should be (IBAT_MAX) of 4A. Changing RS1 to kept together and next to LT1505 con0.050 will set the IBAT_MAX to 2A. trol circuitry. The goal is to keep all Also, the peak battery charging high power switching currents as locurrent (IBAT_MAX) can be programmed calized as possible. Components that by the host computer. The IBAT_MAX connect to the ground plane should can be set in increments of 0.25A if have vias placed as close as possible to RPROG is replaced by a network of the pins connected to the ground plane. resistors, as shown in Figure 3. Also, power components should have larger or multiple vias connecting to 100 95 90 EFFICIENCY (%) where ISYSTEM is the system load current, ICHARGER is the LT1505 battery charger current and RS4 is the current sense resistor. With the resistor value of 0.025 in Figure 2, the input current limit IIN_MAX will be set to 3.6A. The battery charging current limit is set by RPROG, RS1 and RS2 and is: 85 80 75 70 65 60 0 1 2 3 OUTPUT CURRENT (A) 4 TA02 Figure 4. Efficiency of 4A, 12.6V1611battery charger at 20V input the ground plane. Avoid placing the power components in such a way that input and output currents flow by the LT1505 IC. Also, to keep the component temperature rise low, use as much copper as possible. The use of polygon planes for high power nets such as the o n e s c o n n e c t i n g t o V IN, V CC, continued on page 35 LT1505 LIMITED INPUT POWER PROG 2A 1A 10k 0.5A 20k 40.2k 4x 2N3904 FROM P 0.25A 80.6k BATTERY CHARGE CURRENT SENSE RP1 330 CP1 1F { Figure 3. Programming of battery-charge current Linear Technology Magazine * February 1999 LT1505 BASED CONVERTER SYSTEM LOAD BATTERY SUPPLIES ADDITIONAL PEAK POWER Figure 5. Typical telecom application 25 DESIGN IDEAS No RSENSE Controller Delivers 12V and 100W at 97% Efficiency by Christopher B. Umminger maximum temperature of 75C in a 25C environment. L1 is a customwound inductor using fourteen turns of 15 gauge wire on a Magnetics, Inc. Kool M(R) 77206-A7 core. The entire converter takes up a volume of only 0.65in3 and processes an impressive 150W per cubic inch. The circuit uses the LTC1625 No RSENSETM controller to deliver the high output voltage with excellent efficiency. This controller provides true current mode control without using a sense resistor by monitoring the voltage drop across the power MOSFET switches. Eliminating the sense resistor saves board space and improves efficiency. In this application, a 0.01 sense resistor would dissipate about 0.7W at full load. Many current mode controllers use a sense resistor in series with the inductor. Unfortunately, they must restrict the maximum output voltage RF 1 CF 0.1F 1 2 CSS 0.1F 3 4 CC1 2200pF RC1 20k 5 CC2 100pF 6 7 R1 3.92k 8 LTC1625CS 16 VIN EXTVCC M1 15 TK SYNC FDS6670A 14 SW RUN/SS 13 TG FCB L1 15H 12 BOOST ITH CB 11 DB CMDSH-3 0.22F INTVCC SGND 10 D1 BG VOSENSE MBRS9 + C 140T3 PGND VCC VPROG M2 4.7F FDS6670A R2 35.7k VIN CIN 12V-28V 10F 30V x4 + due to limits on the input range of the current comparator. However, the LTC1625 has no such constraint. The circuit in Figure 1 uses the LTC1625 in its adjustable mode, with the VPROG pin left open. The internal error amplifier compares the voltage at the VOSENSE pin to a 1.19V reference and an external resistive divider sets the output voltage. Figure 2 shows that 97% efficiency is achieved over a wide range of load current. The application uses the FCB pin to disable Burst Mode operation and force continuous, synchronous operation down to no load. Enabling Burst Mode would keep the efficiency above 90% down to a load of only 50mA. The current mode control of the LTC1625 incorporates foldback current limiting that reduces the output current to 6A when the output is shorted. Kool M is a registered trademark of Magnetics, Inc. 100 95 VOUT 12V/8.5A + COUT 150F 16V x2 EFFICIENCY (%) Heat removal presents a thorny problem in many of today's compact systems. This is especially the case when power converters deliver high output voltages with several amperes of current and are processing tens to hundreds of watts. In this regime, a converter with only moderate efficiency will have a significant amount of waste heat and may require heat sinks and additional air flow. A very high efficiency converter can reduce the wasted power, which saves space and lowers costs. The circuit shown in Figure 1 is a power converter that produces a 12V output at up to 8.5A from an input that can range between 12V and 28V. The 100W of output power is converted at 97% efficiency with only 3W dissipated on the board. No special heat sinks were used other than a widened VIN trace connected to the drain of M1. This point reached a 90 85 VIN = 24V VOUT = 12V 80 0 CIN: SANYO OS-CON 30SC10M COUT: SANYO OS-CON 16SA150M 4 6 LOAD CURRENT (A) 8 10 (619) 661-6835 Figure 1. 100W, 12V, 8.5A supply 26 2 Figure 2. Efficiency vs load current for Figure 1's circuit Linear Technology Magazine * February 1999 DESIGN IDEAS Generating Low Cost, Low Noise, Dual-Voltage Supplies by Ajmal Godil Some sensitive electronic applications, such as telecommunication and data acquisition, require both 5V and -5V low noise supplies, which may have to be generated from a single high voltage positive supply. The circuit in Figure 1 shows a cost-effective way to generate 5V and -5V from a single 10V-28V supply by using the low noise LT1777 and a few off-theshelf components. The LT1777 is a step-down regulator specially designed for low noise applications. In order to achieve low VIN 10V-28V 4 10 3 SHDN 14 100pF VCC VSW VIN VD SHDN VC FB LT1777 GND GND 12 R3 22k 7 SYNC SGND GND GND 6 continued on page 29 L1B 200H LSENSE 0.47H +VOUT 5V* 5 1 8 D1 MBRS1100 12 C2** 4.7F + -VOUT -5V* C8 1F 10V Table 1. Allowable load current on the -5V supply vs input voltage and 5V load current 5V ILOAD (mA) Maximum allowed current on the -5V supply (mA) VIN = 10V 50 40 100 70 200 110 300 130 350 140 VIN = 18V 50 90 100 150 200 200 300 230 350 200 VIN = 28V D2 MBRS1100 L1A 200H L1A/B: COILTRONICS CTX200-4 (561) 241-7876 LSENSE: GOWANDA SML32-470K (716) 532-2234 C3, C7: AVX TPSD107M010R0065 (803) 946-0362 C6: 63CV1D0BS C2: AVX 1206YG475 R1 36.5k 1% R2 12.1k 1% 9 C4 100pF C5 2200pF C1 1F 10V C3 100F 10V 13 + C6 100F 63V noise, the LT1777 is equipped with dI/dt limiting circuitry, which is programmed via a small external inductor in the power path. It also contains internal circuitry to limit the dV/dt turn-on and turn-off ramp rates. Figure 2 shows the VSW node voltage and the VSW node current for the low noise LT1777. Figure 3 shows the VSW node voltage and VSW node current for the high voltage LT1676 buck regulator under the same test conditions. It can be seen from Figures 2 and 3 that the C7 100F 10V * SEE TABLE 1 FOR RELATIONSHIP BETWEEN LOAD ON +VOUT AND MAXIMUM CURRENT ON -VOUT. ** THIS IS A CERAMIC CAP, BUT A TANTALUM CAP COULD ALSO BE USED 50 130 100 180 200 260 300 270 350 230 Figure 1. This cost-effective supply generates 5V from a 10V-28V input. VSW NODE VOLTAGE VSW NODE VOLTAGE 10V/DIV 10V/DIV VSW NODE CURRENT VSW NODE CURRENT 200mA/DIV 200mA/DIV 500ns/DIV Figure 2. VSW node voltage and node current for the LT1777 Linear Technology Magazine * February 1999 500ns/DIV Figure 3. VSW node voltage and node current for the LT1676 27 DESIGN IDEAS Switched Capacitor Voltage Regulator Provides Current Gain by Jeff Witt A switched capacitor voltage inverter is normally used to generate a negative supply voltage from a positive input supply. The negative supply current is equal in magnitude to the current drawn from the input. This design idea describes two circuits that use an inverter to double the current between the input and output, increasing efficiency and eliminating heat dissipation problems. V VIN VIN CAP+ GND CAP- CAP- VOUT VOUT -V I Figure 1. Rewiring a switched capacitor inverter for step-down regulation results in a current gain of 2. charging C1 into the output. The current delivered to the output is continuous and equal to twice the average input current. Because the output current is continuous, the output voltage ripple is low. Note that C1 and COUT do not need to be matched, as their voltages are equalized on each cycle. Figure 3 shows the actual circuit. Instead of halving the input voltage, the LT1054 modulates the input current (through switch 1 of Figure 2) to regulate the output voltage. This cir- 1 1 3 3 VOUT C1 VOUT 2 2 COUT 4 COUT CURRENT FLOW Figure 2. The LT1054's internal switches alternately charge and discharge C1, delivering a continuous current to the output. 28 cuit can deliver 200mA at 5V from an input of 11.2V to 13V. Typical efficiency is 74%, compared to 42% for a linear regulator. More importantly, dissipation is decreased from 1.4W for the linear regulator to 0.35W, easily managed by the LT1054's 8-pin surface mount package. For a 3.3V/ 200mA output, the circuit is 49% efficient, compared to a linear regulator's 27%, with power dissipation reduced from 1.8W to 0.7W. A 6.2 resistor in series with C1 shares the dissipated power with the LT1054; no heat sink is needed. Three Diodes Improve the Inverter VIN C1 V/2 GND 2I VIN 4 I CAP+ More Efficient than a Linear If the roles of the ground and output pins are swapped (Figure 1), an inverter will divide the input voltage by two. This circuit can be used in place of a linear regulator when the input voltage is more than twice the desired output, for example, regulation of 12V to 5V or 3.3V. The circuit's operation is illustrated in Figure 2. An internal oscillator alternately closes and opens four switches. In the first half cycle, switches 1 and 2 are closed and current flows from the input to the output, charging C1. In the second half cycle, switches 3 and 4 are closed, dis- V I The same advantages can be realized while generating a negative output. However, a switched capacitor inverter does not have the right compliment of switches. By adding three diodes (see Figure 4), the inverter can charge two capacitors in series and then discharge them in parallel to an output capacitor. The absolute value of the output voltage will equal half of the input voltage, minus some loss due to the switches and diodes. Figure 5 shows a practical circuit, which converts 12V to -4V. The LT1054's servo loop keeps the output regulated to -4V over an input range of 11V to 15V and a load current up to Linear Technology Magazine * February 1999 DESIGN IDEAS VIN 11V-15V VIN 12V 8 + 10F + C1* 10F 2 GND CAP+ 8 6.8F V+ 3 VOUT 5V/200mA 6 VREF LT1054CS8 1 CAP- 4 FB/SHDN R1 39.2k R3* 200k VOUT 5 + 2 C1 33F V+ CAP+ VREF U1 LT1054CS8 10F D2 D1 330pF C2 33F 4 Figure 3. This switched capacitor regulator doubles the current between the input and the output, increasing efficiency and eliminating the need for a heat sink. 1 3 86.6k C3 33F CAP- VOUT 5 C1, C2, C3: AVX TAJB336M010R C4: AVX TAJB685M025R D1, D2, D3: MOTOROLA MBR0520LT1 Q1: IR IRLML2402 *FOR 3.3V/200mA, SET R4 = 147k, PUT 6.2 IN SERIES WITH C1 AND PRELOAD WITH R4 = 2.2k 100mA. (Unfortunately, there is too much voltage loss to regulate to -5V from a 12V source.) Note that many negative supplies will power loads that can pull the output above ground (op amp circuits in particular); Q1 prevents such a load from pulling U1's VOUT pin above its ground pin. 20.0k FB/SHDN D3 GND R4* 33k 6 VOUT -4V/100mA Q1 Figure 5. This circuit converts 12V to -4V. Only 63mA of input current is required for 100mA of output current. Because most of U1's operating current flows out of its ground pin, the input current to this circuit is a bit more than one-half of the output current. While delivering 100mA, the input from 12V was measured at 64mA, resulting in 53% efficiency. One alternative, a switched capacitor inverter followed by a linear regulator, would be 33% efficient at best and power dissipation would be 0.8W. This circuit dissipates only 0.35W, allowing this all-surface mount circuit to run cool. VIN VIN 1 1 3 3 2 2 4 4 VOUT VOUT CURRENT FLOW Figure 4. Adding three diodes to a switched capacitor inverter doubles the current between the input and the output. LT1777, continued from page 27 switch node voltage and current waveforms for the LT1777 are more controlled and rise and fall more slowly than those of the LT1676 regulator. By slowing down the sharp edges during turn-on and turn-off for the power switch, conducted and radiated EMI are reduced. The circuit in Figure 1 shows three inductors: L1A, L1B and LSENSE. L1A Linear Technology Magazine * February 1999 and L1B are two windings on a single core to generate 5V. C2 has been added to minimize coupling mismatches between the two windings (L1A and L1B); this forces the winding potentials to be equal and improves cross-regulation. This creates the dual SEPIC (single-ended primary inductance converter) topology. LSENSE is a user-selectable sense inductor to pro- gram the dI/dt ramp rate (see the LT1777 Data Sheet for more information). Table 1 summarizes the allowable load current on the -5V supply as a function of input supply voltage and the load current on the 5V supply. Note that 5V and -5V supplies are allowed to droop by 0.25V, which corresponds to 5% load regulation. 29 DESIGN IDEAS High Current Step-Down Conversion from Low Input Voltages by Dave Dwelley VIN 3.3V RIMAX 51k D1 MBR0530 drive to work efficiently. Two attractive solutions to generating 2.5V or less from a 3.3V supply are possible using the LTC1649 and the LTC1430A. The LTC1649 is a switching regulator controller designed to use 5V MOSFETs while running from an input supply as low as 2.7V. No 5V supply is required. The LTC1649 includes an Q1, Q2 IRF7801 TWO IN PARALLEL C2 1F PVCC1 G1 PVCC2 IFB R3 22 C3 10F 100 CIN 3300F 90 LEXT 1.2H VOUT 2.5V/15A R4 1k SHDN + C+ C1 CC 220pF 0.01F CSS 0.1F R2 12.7k CPOUT C4 10F RIMAX 51k C2 1F VCC 5V PVCC1 1649 TA01 (310) 322-3331 (800) 441-2447 C3 10F CIN 3300F LEXT 1.2H VOUT 2.5V/15A IFB Q3 IRF7801 SENSE+ NC COMP SENSE- NC SS NC SHDN + RC 7.5k C1 220pF + R4 1k VCC G2 LTC1430A FB IMAX SHDN Q1, Q2 IRF7801 TWO IN PARALLEL G1 R3 22 PVCC2 GND FREQSET R1 12.4k + COUT 4400F R2 12.7k PGND CC 0.01F CSS 0.1F IRF7801 = INTERNATIONAL RECTIFIER MBR0530 = MOTOROLA (310) 322-3331 (800) 441-2447 1649 TA01 Figure 3. 3.3V to 2.5V/15A converter using a 5V auxiliary supply and the LTC1430A 30 40 1 10 LOAD CURRENT (A) 100 1649 TA02 Figure 1. 3.3V to 2.5V/15A converter using the LTC1649 D1 MBR0530 60 Figure 2. Efficiency of Figure 1's circuit C5 0.33F + D2 MBR0530 IRF7801 = INTERNATIONAL RECTIFIER MBR0530 = MOTOROLA VIN 3.3V 70 0.1 C- GND COUT 4400F 1F SS 80 50 + VIN COMP RC 7.5k R1 12.4k Q3 IRF7801 VCC G2 LTC1649 IMAX FB SHDN + onboard charge pump to generate the 5V gate drive that the external power MOSFETs require. It also features an architecture designed to use all N-channel external MOSFETs and a high performance voltage mode feedback loop to ensure excellent transient response for use with high speed microprocessors and logic. EFFICIENCY (%) Many modern logic systems run with 3.3V as the sole power source. At the same time, some modern microprocessors and ASICs require supply voltages of 2.5V or less. Traditional step-down switching regulators can have difficulty running from the 3.3V supply, because affordable power MOSFETs generally require 5V gate A typical circuit is shown in Figure 1. The 3.3V supply voltage at VIN is converted to a regulated 5V output at CPOUT. This 5V supply powers the PVCC2 and VCC pins to provide gate drive to Q3. Q1 and Q2 require an additional charge-pump stage to drive their gates above the VIN supply voltage. D1 and C2 provide this boosted supply at PVCC1. The voltage feedback loop is closed through R1 and R2, with loop compensation provided by an RC network at the COMP pin. Softstart time is programmed by the value of CSS. Maximum output current is set by RIMAX at the IMAX pin and is sensed across the RDS(ON) of the Q1/Q2 pair, eliminating the need for a high current external resistor to monitor current. The circuit boasts efficiency approaching 95% at 5A (Figure 2). Some applications have a small 5V supply available, but need to draw the load current from the 3.3V supply. Such an application can use the circuit shown in Figure 3, with the continued on page 35 Linear Technology Magazine * February 1999 DESIGN IDEAS How to Design High Order Filters with Stopband Notches Using the LTC1562 Operational Filter (Part 2) by Nello Sevastopoulos This is the second in a series of articles describing applications of the LTC1562 connected as a lowpass, highpass or bandpass filter with added stopband notches to increase selectivity. Part 1 (Linear Technology VIII:2, May 1998, pp. 28-31) described one method of coupling the four Operational FilterTM building blocks of the LTC1562 to design an 8th order lowpass filter with two stopband notches. Part 2 expands the technique of Part 1 to design an 8th order bandpass filter with two stopband notches. Throughout this series of articles, notches will be generated by first summing the input signal with a 180 degree out-of-phase signal appearing at the output(s) of the LTC1562 Operational Filter and second, by adjusting the summation gains to yield a zero sum. Part 1 showed one proprietary method of creating notches in the stopband of a lowpass filter. The essence of this method is briefly revisited in Figure 1, where two of 1/2 LTC1562 four Operational Filter sections are coupled to form a 4th order lowpass filter with one stopband notch. The notch is obtained by summing the input signal, VIN, with the output, V1A, into the inverting node of the next section of the IC. The two signals, VIN and V1A, will tend to cancel each other at a frequency where they are 180 degrees out of phase. The cancellation will be complete if the amplitudes of VIN and VIA yield equal (and opposite) currents at the summing junction of the op amp of Figure 1, that is if: RIN2 = RFF2 * (RQ1/RIN1) (1) In Figure 1, the lead capacitor CIN1 raises the frequency where a 180 degree phase shift occurs above the center frequency of the 2nd order section (fO). The resulting notch frequency is then higher than the cutoff frequency of the 4th order filter. Figure 1 can be easily modified to make the frequency of the notch lower than the center frequency of the 2nd C - C R21 R1 * * RQ1 CIN1 RIN1 (R1 = 10k; C = 159.15pF) and the gain conditions dictating Equation 1 now translate to: RIN2 = RFF2 * ( ( RQ1 CIN1 * C R1 (3) The circuit of Figure 2 can be used to build a 4th order bandpass filter with one notch below its center frequency. Such a filter can simultaneously detect a tone and reject an unwanted frequency located in the vicinity of the passband. RFF2 RIN1 1 20 CIN1 RQ2 CIN1 R21 R21 (2) RQ1 + + RQ1 1- VIN - 1 VIN fN2 = fO1 * C RIN2 RIN1 order section from which it is derived. This is useful in bandpass filters where an unwanted frequency lower than the center frequency of the filter must be rejected. This is shown in Figure 2, where the input signal is summed with output V2A instead of output V1A. The frequency of the resulting notch is: 2 V1A 19 V1B R22 2 V1A LTC1562 3 3 V2A 1 sCR1 1 sCR1 18 V2B R1, C ARE PRECISION INTERNAL COMPONENTS R1 = 10k; C = 159.15pF Figure 1. Two out of four Operational Filter sections are coupled to form a 4th order lowpass filter with one stopband notch. Linear Technology Magazine * February 1999 V2A (OTHER CONNECTIONS AS SHOWN IN FIGURE 1) Figure 2. Figure 1's circuit modified to make the frequency of the notch lower than the center frequency of the 2nd order section from which it is derived. 31 DESIGN IDEAS 20 Table 1. Parameters of the four sections of an 8th order, 100kHz bandpass filter GAIN (dB) -20 -40 -60 -65dB BANDWIDTH -80 -100 -120 50 60 70 80 90 100 110 120 130 140 150 FREQUENCY (kHz) Figure 3. Theoretical amplitude response of 8th order, 100kHz bandpass filter The notch techniques of Figures 1 and 2 will be referred as "feedforward." This is necessary to separate these techniques from others to be shown later, in Part 3 of this series of articles. The feedforward notch technique of Figure 2 can be advantageously combined with Figure 1 to realize sharp bandpass filters with two stopband notches: one notch below and one above the center frequency. Filters of this type can be very selective, although they are quite cumbersome to design. A step-by-step design procedure is illustrated below. A Practical Example An 8th order 100kHz bandpass filter is realized, through FilterCADTM for Windows(R) (available at no charge from Linear Technology--see the "Design Tools" page in this issue), by cascading four 2nd order sections of equal Q. The -3dB band-edges are arithmetrically symmetric with respect to the filter's 100kHz center frequency and signals below 80kHz and above 125kHz are attenuated by 60dB or more. Figure 3 shows the theoretical amplitude response and Table 1 shows the desired filter parameters, namely, the center frequencies, Qs and notch frequencies. The filter of Figure 3/Table 1 can be realized by decomposing the 8th order realization into two independent 4th order filter sections and then cascading these two 4th order sections, which is an easier task than designing an 8th order elliptic bandpass filter all at once. FilterCAD, in custom mode, 32 fO 99.9687e3 96.9964e3 103.0322e3 100.0000e3 Q 10.0000 10.0000 10.0000 10.0000 fN ------ 129.2814e3 77.3023e3 ------ should be used to perform this operation. Figure 4 and Table 2 show the filter decomposition and the cascading sequence; note the left and right notches. Figure 5 uses the LTC1562 Operational Filter to realize the filter of Figure 3 as decomposed in Figure 4. The design is split into two 4th order sections. The algorithm to calculate the external passive components is outlined below. In order to obtain a practical realization that closely approximates the theoretical one, the Q of each 2nd order section will be lowered by 15%. (Please consult the LTC1562 final data sheet.) In order to follow the long and tedious algorithm below, consider the intuitive outline: We need to calculate the following set of passive components for the first 4th order section: RIN1, CIN1, R21, RQ1, and RIN2, RFF2, R22 and RQ2. The resistors R21, RQ1, QN ------ ------ ------ ------ Type BP LPN HPN BP R22 and RQ2 are easily calculated via the expression for the center frequency, fOi, and Qi for the 2nd order section "i." The expression for the notch, equation (2), involves the product of RIN1 * CIN1, so neither component can be calculated separately. Instead, RIN1 is calculated by considering the maximum gain (which occurs around the center frequency fO1) at either node V1A or V2A. This controls premature internal clipping. Once RIN1 is set, CIN1 is easily calculated via equation (2) for the lower band notch. Similarly, equation (3) defines the ratio of RIN2 to RFF2, so neither of these components can be calculated independently of the other. R FF2 is calculated by considering the gain factor ("GAIN") of the 4th order filter section at the V1B output (Figure 1/ Table 2)). Once RFF2 is set, RIN2 is calculated via equation (3). 20 0 -20 GAIN (dB) 0 -40 -60 -80 -100 50 60 70 80 90 100 110 120 130 140 150 FREQUENCY (kHz) 50 60 70 80 90 100 110 120 130 140 150 FREQUENCY (kHz) Figure 4. Cascading two 4th order bandpass sections to realize the filter of Figure 3. Table 2. Filter decomposition and cascading sequence fO1 = 96.9964k Q1 = 10 fO2 = 99.9687k Q2 = 10 fO3 = 100k fN2 = 77.3k Q3 = 10 fO4 = 103.0322k Q4 = 10 fN2 = 129.2814k MH(s) = GAIN * N(s)/D(s) MH(s) = GAIN * N(s)/D(s) MGAIN = 0.2823 MGAIN = 0.1788 MN(s) = A1s(s2 + 235 * 9072 * 109) MN(s) = A1s(s2 + 659 * 83 * 109) MA1 = 62.8122 * 103 MA1 = 62.8319 * 103 Linear Technology Magazine * February 1999 DESIGN IDEAS 20 RIN1 = RQ1 * I. Calculate the passive components of the of the first 4th order section (fO1 = 96.9964kHz, Q = 8.5, fO2 = 99.9687kHz, Q = 8.5, fn2 = 77.3kHz) 1. Calculate the center frequencysetting resistor, R21: (For details, please refer to the LTC1562 data sheet.) R21 = (100kHz/fO1)2 * 10k = 10.629k (choose the closest 1% value, R21 = 10.7k (1%)) 2. Calculate the Q-setting resistor, RQ1: (For details, please refer to the LTC1562 data sheet) RQ1 = Q1 R21 * 10k = 87.925k (choose the closest 1% value, RQ1 = 86.6k (1%)) 3. Calculate the input resistor RIN1 from the following expression(s): 3a. if fO1 100kHz (for LTC1562) 1 1+ (5) ( Q12 * 1 - 0 2 2 fN2 fO1 2 ( Make sure, in either case 3a or 3b, that RIN1 is greater than R21, that is, the DC gain at pin 3 in Figure 5 is less than unity; if not set RIN1 = R21 and proceed to step 4a. The expression for RIN1 sets the gain at fO1 equal to unity at the node of maximum swing (V1A or V2A). Note that, for high Qs, the gain at fO1 is the maximum gain. If you know the spectrum of the signals that will be applied to the filter input and if internal gains higher than unity will be allowed, the value of RIN1 can be reduced to improve the input signal-to-noise ratio. 4a. Use the value of RIN1, calculated above, and calculate the value for the input capacitor CIN1 from the notch equation (2). -20 GAIN (dB) The same design method is later repeated to derive the passive components for the second 4th order section: -40 -60 -65dB BANDWIDTH -80 -100 -120 50 60 70 80 90 100 110 120 130 140 150 FREQUENCY (kHz) Figure 6. Measured amplitude response of Figure 5's filter 4b. Recalculate the value of RIN1 after CIN1 is chosen. RIN1 = (CIN1(ideal) RIN1(ideal))/ CIN1(NPO,0402) = 96.22k Choose the closest 1% value: RIN1 = 95.3k (1%) 5. Calculate the frequency- and Qsetting resistors R22, RQ2, as done in steps 1 and 2, above. Choose the closest 1% standard 1 resistor values. (6) R21 R1 2 R22 = 10k (1%); CIN1 = fN2 * * C RQ1 RIN1 1- RQ1 = 84.5k(1%) fO12 6. Calculate the feedforward resistor, RFF2: 1 (4) (fN1 < fO1; C = 159.15pF) RIN1 = Q1 * R21 * 1 + 1/(RFF2 C) = Gain * A1; 2 2 2 1 - fN2 C = 159.15pF Q1 * CIN1 = 5.639pF. fO12 The values for parameter (Gain * Use the commercially available NPO A1) are provided by FilterCAD; they RIN1 = 95.56k type 0402 surface mount capacitor relate to the coefficients of the nuAlthough not applicable for this with the value nearest the ideal value merator of the transfer function (V1B/ example, thoroughness dictates men- of CIN1 calculated above. For instance, VIN in Figure 1); a passband AC gain of tioning the case below: for CIN1, choose an off-the-shelf 5.6pF unity is assumed (see Table 2). Please 3b. if fO1 100kHz (for LTC1562) capacitor. note that, for a lowpass case, as in Part 1 of this article series, the value of (Gain * A1) is the DC gain of the RFF2, 357k filter and its value can be easily set CIN1, 5.6pF RIN2, 110k without software assistance. Equating the numerator of the fil16 1 INV C VIN INV B R , 84.5k ter transfer function with the values RIN1, 10.7k RQ1, 86.6k Q2 15 2 V1 C V1 B provided by FilterCAD: R22, 10k R21,10.7k 14 3 ( ( ( ( V2 C V2 B 4 5V 0.1F 5 6 RIN3, 294k R23, 10k 7 RQ3, 84.5k 8 CIN3, 18pF V- V + LTC1562 SHDN AGND V2 A V2 D V1 A V1 D INV A INV D 13 12 -5V 0.1F 11 10 R24, 9.53k 9 RQ4, 82.5k GAIN = 0.2823 A1 = 62.8122 * 103 A2 = (2fN2)2 = 235.9 * 109 RIN4, 95.3k RFF4, 332k V1B s(s2 + N22) GAIN (A1s)(s2 + A2) (7) = = VIN (RFF2 * C) * D(s) D(s) VOUT 1562 TA03 RFF2 = 1/((Gain A1) C) = 354.35k; C = 159.15pF RFF2 = 357k(1%) Figure 5. Hardware realization of the filter in Figure 3, using all four sections of an LTC1562 Linear Technology Magazine * February 1999 33 DESIGN IDEAS VIN(RMS), fOUT = 100kHz 5 4a. Use the theoretical value for RIN3, calculated above, and calculate the value of the input capacitor CIN3 from the notch equation (2) of part 1 of this article; for convenience this is repeated below: VS = 5V 1 f 2 R CIN3 = C * Q3 * 1 - O3 RIN3 fN42 ( 0.1 0.1 1 5 ( condition for the occurrence of a notch. For convenience, this gain condition is repeated below. RIN4 = RFF4 * RQ3 RIN3 (12) RIN4 = 95.422k; RIN4 = 95.3k(1%) (10) Experimental Results Figure 6 shows the measured amplitude response of the filter of Figure 5. Use a commercially available NPO- The values of the passive component type 0402 surface mount capacitor are as calculated above and as shown with the value nearest the ideal value in Figure 5. The measured amplitude of CIN3 calculated above. For instance, response closely approximates the 7. Solve for RIN2 by using Equation C IN3 = 18pF. ideal response as synthesized by Fil(3), which dictates the gain 4b. Recalculate the value for RIN3 terCAD. The peak frequency with condition for the occurrence of calculated in step 3a after CIN3 standard 1% resistor values and 5% the notch: is chosen. capacitor values is 100.65kHz (0.65% RIN2 = (RFF2 RQ1 CIN1)/(R1 C) = 108.785k; (R1,C) = (10k, 159.15pF) RIN3 = (CIN3(ideal) RIN3(ideal))/CIN3(NPO,0402) off). The higher frequency notch, although it shows a respectable depth RIN2 = 110k (1%) = 300.058k of 70dB, is not as well defined as the RIN3 = 294k (1%) notch below the filter's center freII. Calculate the passive 5. Calculate the frequency- and quency, yet the -65dB bandwidth is components of the second 4th Q-setting resistors, R24 and as predicted by FilterCAD. The 10dB order section RQ4, as done in steps 1 and 2, lack of the upper band notch depth is (fO3 = 100kHz, Q3 = 8.5, fO4 = above. Choose the nearest 1% due to the finite speed of the internal 103.0322kHz, Q4 = 8.5, fn4 = standard value. op amps; they cause the practical 180 129.2814kHz) degree phase shift frequency and the R24 = 9.42k; R24 = 9.53k (1%) Except for the bandpass gain gain at V1A's output to depart slightly RQ4 = 82.97k; RQ4 = 82.5k (1%) calculations, the algorithm will from the theoretical calculations. be the same as the lowpass 6. Calculate the feedforward For the sake of perfection, the notch design of Part 1 of this article. resistor, RFF4. First equate the depth can be easily restored by tweak1. R23 = (100kHz/fO3)2 * 10k = numerator of the 4th order filter ing the value of RQ3; the new RQ3 will 10k (1%) transfer function with the be 75k. This is shown with dashed 2. RQ3 = Q3 R23 * 10k = 85k, values provided by FilterCAD lines in Figure 6. This, however, lowRQ3 = 84.5k (1%) (see Table 2): ers the passband gain by the ratio of 3. Calculate the input resistor RIN3 the new to the old RQ3 value, that is, from the following expression(s): O32 s2 + N42 (11) by about -1.0dB (you cannot fool VOUT s 3a. if fO3 100kHz (for LTC1562) = = * * V1B mother nature). Depending on the D(s) RFF4 * C O42 2 2 (8) application, the 10dB of additional 1 + 1 - fO3 * Q32 RIN3 = Q3 * R23 * GAIN * A1s * (s2 + N42) notch depth for 1.5dB of passband fN42 D(s) gain loss may be a reasonable trade. The passband gain can also be cor2 O3 RIN3 = 302.41k 1 1 rected by lowering the values of either THEN RFF4 = * * 2 GAIN * A1 C N4 3b. if fO3 100kHz (for LTC1562) pair, (RFF2, RIN2) or (RFF4, RIN4), by the GAIN = 0.1788 same amount (1.5dB). In Figure 6, 2 (9) A1 = 62.8319 * 103 fO32 the gain was restored to 0dB by chang2 1 + 1 - * Q3 RIN3 = RQ3 * 2 ing the values of RIN2, RFF2 to 93.1k fN4 and 300.1k respectively. RFF4 = 334.64k, choose RFF4 = 332k The total integrated noise was an For fO3 = 100kHz, as in the example (1%). impressively low 69VRMS, allowing a above, either expression can be used. 7. Solve for RIN4 by using equation signal-to-noise ratio well in excess of Note that the expression for RIN3 in (1) of Part 1 of this article, 80dB. The input signal-to-noise ratio 3b, above, is the same as expression which dictates the gain can be further increased if the passfor RIN1 shown in Part 1 of this article. VOUT(RMS), fOUT = 100kHz CIN3 = 17.86pF; Figure 7. Gain linearity of Figure 5's filter, measured at the 100kHz theoretical center frequency ( ( 34 ( ( Linear Technology Magazine * February 1999 CONTINUATIONS range. This is true provided the filter magnitude response does not change with varying input signal levels, that is, the filter gain is linear. The gain linearity measured at the 100kHz theoretical center frequency of the filter is shown in Figure 7. The gain is perfectly linear for input amplitudes up to 1.25VRMS (3.5VP-P) so an 84dB dynamic range can be claimed. The input signal, however, can reach amplitudes up to 3VRMS (8.4VP-P, 92dB SNR) with some reduction in gain linearity. The LTC1735 and LTC1736 are the latest members of Linear Technology's family of constant frequency, N-channel high efficiency controllers. With new protection features, improved circuit operation and strong MOSFET drivers, the LTC1735 is an ideal upgrade to the LTC1435/LTC1435A for higher current applications. With the integrated VID control, the LTC1736 is ideal for CPU power applications. The high performance of these controllers with wide input range, 1% reference and tight load regulation makes them ideal for next generation designs. LTC1562-2, continued from page 10 References level is 44VRMS over a bandwidth of 800kHz or 98dB below the maximum unclipped output. 1. Hauser, Max. "Universal Continuous-Time Filter Challenges Discrete Designs." Linear Technology VIII:1 (February 1998), pp. 1-5 and 32. 2. Sevastopoulos, Nello. "How to Design High Order Filters with Stopband Notches Using the LTC1562 Quad Operational Filter, Part 1." Linear Technology VIII:2 (May 1998), pp. 28-31. 3. Sevastopoulos, Nello. "How to Design High Order Filters with Stopband Notches Using the LTC1562 Quad Operational Filter, Part 2." in the Design Ideas section of this issue of Linear Technology. 4. LTC1562 Final Data Sheet. 5. For example: Schwartz, Mischa. Information Transmission, Modulation, and Noise, fourth edition, pp. 180-192. McGraw-Hill 1990. band gain can be higher than 0dB or if internal nodes are allowed to have gains higher than 0dB. Please contact the LTC Filter Design and Applications Group for further details. The low noise behavior of the filter makes it useful in applications where the input signal has a wide voltage LTC1735/LTC1736, continued from page 6 Conclusion Acknowledgments Philip Karantzalis and Nello Sevastopoulos of LTC's Monolithic Filter Design and Applications Group contributed to the application examples. LT1505, continued from page 25 SW, VBAT and GND in Figure 2 will help in spreading the heat and will reduce the power dissipation in conductors and MOSFETs. By doing so, the required peak power from the wall adapter can be much lower than the peak power required by the load. The wall adapter has to supply the average power only. The LT1505 can also be used in other system topologies, such as the telecom application shown in Figure 5. The circuit in Figure 5 uses the battery to supply peak power demands. Conclusion The LT1505 is a complete, singlechip battery charger solution for today's demanding charging requirements in high performance laptop applications. The device requires a small number of external components and provides all necessary functions for battery charging and power management. High efficiency and small size allow for easy integration with the laptop circuits. Also, by adding a simple external circuit, charging can be easily controlled by the host computer, allowing for more sophisticated charging schemes. Step-Down Conversion, continued from page 30 cuitry works in the same manner as in Figure 1. Efficiency and performance are virtually the same as the LTC1649 solution, but parts count and system cost are lower. In a 3.3V to 2.5V application, the steady-state, no-load duty cycle is 76%. If the input supply drops to 3.135V (3.3V - 5%), the duty cycle requirement rises to 80% at no load, and even higher under heavy or transient load conditions. Both the LTC1649 and the LTC1430A guarantee a maximum duty cycle of greater than 90% to provide acceptable load regulation and transient response. The standard LTC1430 (not the LTC1430A) can max out as low as 83%--not high enough for 3.3V to 2.5V circuits. Applications with larger step-down ratios, such as 3.3V to 2.0V, can use the circuit in Figure 3 successfully with a standar d LTC1430. Other Applications lower cost LTC1430A replacing the LTC1649. The LTC1430A does not include the 3.3V to 5V charge pump and requires a 5V supply to drive the external MOSFET gates. The current drawn from the 5V supply depends on the gate charge of the external MOSFETs but is typically below 50mA, regardless of the load current on the 2.5V output. The drains of the Q1/Q2 pair draw the main load current from the 3.3V supply. The remaining cirLinear Technology Magazine * February 1999 35 DESIGN INFORMATION The LTC1658 and LTC1655: Smallest Rail-to-Rail 14-Bit and 16-Bit DACs by Hassan Malik Expanding the rail-to-rail, voltage output DAC family, Linear Technology introduces two new voltage output DACs that break the size/bits barrier. The LTC1658 is a 14-bit rail-to-rail voltage output DAC in a tiny MSOP-8 package and the LTC1655 is a 16-bit voltage output DAC in an SO-8 package. Both of these DACs also provide a convenient upgrade path for users of LTC's 12bit voltage output DAC family. The LTC1658 draws only 270A from a 3V or 5V supply and is 14-bit monotonic over temperature. The LTC1655 draws 600A from a 5V supply and is 16-bit monotonic over temperature. 2.7V TO 5.5V 8 These DACs have a flexible 3-wire serial interface that is SPI/QSPI and MICROWIRE compatible. Figures 1 demonstrates the ease of using the LTC1658. The output swings from 0V to VREF at full-scale. VREF should be less than or equal to VCC to prevent the loss of codes and degradation of PSRR near full-scale. The input serial data is loaded as one 16-bit word with two dummy bits. The digital inputs are TTL/CMOS level compatible and the CLK input has an internal Schmitt trigger for noise immunity. This allows direct optocoupler interfacing to the part. Figure 2 plots the part's 0.25LSB typical DNL. 6 VCC REF 2 DIN P 3 CS/LD + 16-BIT SHIFT REG AND DAC LATCH 1.0 VOUT 14 14-BIT DAC RAIL-TO-RAIL VOLTAGE OUTPUT 7 - 4 DOUT POWER-ON RESET TO OTHER DACS 0.8 0.6 DNL ERROR (LSB) 1 CLK A typical application for the LTC1655 is shown in Figure 3. The LTC1655 has the same interface as the LTC1658 and is also capable of being daisy chained. There is an onboard 2.048V bandgap reference connected internally to the 16-bit DAC. The rail-to-rail output nominally swings from 0V to 4.096V, since there is a gain of two in the output amplifier. The reference pin can be overdriven to a value higher than 2.048V if a larger output swing is desired. Since there is a gain of 2 from the reference pin to the output at fullscale, the voltage on the REF pin must always be less than VCC /2. Figure 4 plots the typical DNL of the LTC1655. 0.4 0.2 0 - 0.2 - 0.4 - 0.6 GND 1658 TA01 - 0.8 5 - 1.0 0 4096 Figure 1. LTC1658 block diagram 8192 CODE 12288 16383 1658 TA02 4.5V TO 5.5V 8 1 CLK P 3 CS/LD 2.048V 6 REF 1.0 REF + 16-BIT SHIFT REG AND DAC LATCH 16 16-BIT DAC - 0.8 VOUT 7 RAIL-TO-RAIL VOLTAGE OUTPUT 4 DOUT TO OTHER DACS POWER-ON RESET 0.6 DNL ERROR (LSB) VCC 2 DIN Figure 2. The LTC1658 14-bit rail-to-rail DAC in MSOP has 0.25LSB typical DNL. 0.4 0.2 0 - 0.2 - 0.4 - 0.6 - 0.8 GND 5 1658 TA01 - 1.0 0 16384 32768 CODE 49152 65535 1658 TA02 Figure 3. LTC1655 block diagram 36 Figure 4. LTC1655 typical DNL plot Linear Technology Magazine * February 1999 NEW DEVICE CAMEOS New Device Cameos LTC1502-3.3 gain of 1 from reference to output; the Single Cell to 3.3V Reference pin can be tied to VCC for Inductorless DC/DC Converter full rail-to-rail operation. The output The LTC1502-3.3 is LTC's latest offering in the regulated charge pump arena. This new charge pump is the only inductorless single-cell boost converter in the industry. The part employs a quadrupler switched capacitor architecture to generate a regulated 3.3V supply from a single NiCd or alkaline cell. Start-up enhancement circuitry enables the LTC1502-3.3 to power up with VIN as low as 0.8V. Only five small ceramic capacitors are required to make a complete 3.3V single-cell power supply with 10mA of output load capability. The part also has a shutdown feature that disconnects the load from VIN and reduces quiescent current to only 5A. The LTC1502-3.3 is shortcircuit protected and can survive an indefinite VOUT short to GND. Small size (8-pin MSOP package) and low quiescent current (40A typical) make the LTC1502-3.3 ideal for space conscious, low power applications such as pagers and PDAs. Since the VOUT pin is high impedance during shutdown, the part is also well suited for single-cell battery backup applications. LTC1661 Micropower Dual 10-Bit DAC with Sleep Mode Available in MS-8 The LTC1661 is a micropower, dual, 10-bit voltage-output DAC that is available in a tiny 8-pin MSOP package. Required board area is only 0.01in2 per DAC. Operating on a single 2.7-5.5V supply, the LTC1661 draws just 60A per DAC (120A total for the part) for true micropower performance. Sleep mode further reduces total supplyplus-reference current to just 1A. The LTC1661 is guaranteed monotonic over temperature--differential nonlinearity error is typically 0.2LSB (0.75LSB Max). Each DAC has a Linear Technology Magazine * February 1999 amplifiers are stable driving capacitive loads of up to 1000pF and can source or sink up to 5mA. The outputs swing to within a few millivolts of either supply rail when unloaded and have an equivalent output resistance of 85 when driving a load to the rails. The 3-wire serial interface uses a 16-bit input word comprising 4 control bits, 10 input-code bits, and 2 don't-care bits. Power-on reset is also provided. The input logic is double buffered for additional flexibility in interfacing with the microprocessor and for more effective control of multiple chips that share clock and data lines. Low supply current, power-saving Sleep mode and extremely compact size make the LTC1661 ideal for battery-powered applications, while its straightforward usability, high performance and wide supply range make it an excellent choice as a generalpurpose converter. LTC1841/LTC1842/LTC1843 Dual Micropower Comparator with Built-In Reference The LTC1841/LTC1842/LTC1843 are dual micropower comparators with built-in references (LTC1842/ LTC1843). These parts feature less than 5.7A supply current over temperature, a 1.182V 1% reference (LTC1842/LTC1843), programmable hysteresis (LTC1842/LTC1843) and open-drain output comparators that can sink greater than 20mA. The reference output can drive a bypass capacitor of up to 0.01F without oscillation. The comparators operate from single 2V to 11V supplies or 1V to 5.5V supplies (LTC1841). Comparator hysteresis is easily programmed using two resistors and the HYST pin. The comparator's input operates from the negative supply to within 1.3V of the positive supply. The comparator output stage can typically sink greater than 20mA. By eliminating the crossconduction current that normally occurs when the comparator changes logic states, power supply glitches are eliminated. The LTC1841/LTC1842/LTC1843 are available in 8-pin SO packages. LTC1605-1/-2: 100ksps 16-Bit ADC Now Available with 0V to 4V and 4V Analog Input Ranges The LTC1605-1 and LTC1605-2 are the newest members of Linear Technology's family of 16-bit ADCs. The two new ADCs offer the user a choice of analog input ranges to help make full use of the wide dynamic range offered by these converters. These 100ksps sampling ADCs feature 16-bit resolution with no missing codes and 2LSB INL. They operate from a single 5V supply with typical power dissipation of only 55mW. They are offered in both 28-pin PDIP and SSOP packages. The LTC1605-1 has an analog input range of 0V to 4V with 20V overvoltage protection. This 16-bit ADC is ideally suited for single-supply systems. It is a complete data acquisition system containing a differential, successive-approximation A/D that uses switched capacitor technology to perform a 16-bit conversion. The analog front end consists of a resistor divider network followed by a sample-andhold that allows fast moving signals to be digitized. The LTC1605-1 also has a trimmed bandgap reference that can be overdriven with an external reference if greater accuracy is needed. It also features a simple parallel I/O where the digital output word can be read as a 16-bit word or as two 8-bit bytes. The digital output word format for the LTC1605-1 is straight binary. The LTC1605-2 has a bipolar analog input range of 4V with 20V overvoltage protection (15V overdrive recoverable) operating on a single 5V supply. It is also a complete data acquisition system with the same features and parallel I/O as the 37 NEW DEVICE CAMEOS LTC1605-1. The LTC1605-2 digital output word format is two's complement. LTC1754-5 Regulated Charge Pump Delivers 50mA in an SOT-23 Package The LTC1754-5 is the newest addition to Linear Technology's industry leading family of switched capacitor regulated charge pumps. Combining the best features of its predecessors, it delivers a full 50mA from a tiny SOT-23 package while stepping up from 3V to a regulated 5V. The 6-pin package provides additional functionality by including shutdown capability. Finally, it has built-in thermal shutdown circuitry that allows it to survive a continuous short circuit to ground at its output. The quiescent supply current of the LTC1754-5 is only 13A. This low supply current means very low power consumption in light load applications. Furthermore, because it uses Burst Mode operation, its efficiency is typically 82.7% when delivering moderate to high load current. This efficiency is very close to the ideal 83.3% for a 3V to 5V regulating charge pump. In shutdown, the supply current is guaranteed to be less than 1A. With no inductors and only three small capacitors, the LTC1754-5 regulated charge pump delivers significant power from a small amount of real estate. LTC1569-7: Unique 10th Order, Linear-Phase, DC Accurate Lowpass Filter is Tunable by a Single Resistor The LTC1569-7 is a self-contained 10th order linear-phase filter featuring cutoff frequencies up to 256kHz while operating on supplies from 3.3V (3V minimum) up to 5V. Cutoff frequencies up to 128kHz can also be obtained with a 3V (2.7V minimum) supply. Unlike other monolithic filters, the LTC1569-7's precision on-chip oscillator allows the cutoff for the latest information on LTC products, visit www.linear-tech.com frequency to be set accurately (within 2%) by a single resistor. Alternatively, for swept cutoff frequency applications, an external clock can be used. The amplitude response of the LTC1569-7 approximates a root raised cosine, with an alpha of 0.5, for phase linearity with excellent attenuation. The attenuation of the LTC1569-7 at 1.5 times the cutoff frequency is 55dB, whereas attenuation is in excess of 60dB at 2.1 times the cutoff frequency. The DC offset of the LTC1569-7 is typically 2mV. Its DC gain linearity and SINAD are suitable for 12-bit systems. The input of the filter can be configured as single ended or differential. When operated at full bandwidth, the LTC1569-7 consumes 20mA on a single 5V supply but, when slower sampling rates are required (that is, at lower cutoff frequencies), the device automatically switches to a reduced supply current, which can be as low as 5mA. The LTC1569-7 is available in an 8-pin SO package. Authors can be contacted at (408) 432-1900 For further information on any of the devices mentioned in this issue of Linear Technology, use the reader service card or call the LTC literature service number: 1-800-4-LINEAR Ask for the pertinent data sheets and Application Notes. 38 Linear Technology Magazine * February 1999 DESIGN TOOLS DESIGN TOOLS Applications on Disk Technical Books FilterCADTM 2.0 CD-ROM -- This CD is a powerful filter design tool that supports all of Linear Technology's high performance switched capacitor filters. Included is FilterViewTM, a document navigator that allows you to quickly find Linear Technology monolithic filter data sheets, the FilterCAD manual, application notes, design notes and Linear Technology magazine articles. It does not have to be installed to run FilterCAD. It is not necessary to use FilterView to view the documents, as they are standard .PDF files, readable with any version of Adobe AcrobatTM. FilterCAD runs on Windows(R) 3.1 or Windows 95. FilterView requires Windows 95. The FilterCAD program itself is also available on the web and will be included on the new LinearViewTM CD. Available at no charge. 1990 Linear Databook, Vol I --This 1440 page collection of data sheets covers op amps, voltage regulators, references, comparators, filters, PWMs, data conversion and interface products (bipolar and CMOS), in both commercial and military grades. The catalog features well over 300 devices. $10.00 Noise Disk -- This IBM-PC (or compatible) program allows the user to calculate circuit noise using LTC op amps, determine the best LTC op amp for a low noise application, display the noise data for LTC op amps, calculate resistor noise and calculate noise using specs for any op amp. Available at no charge SPICE Macromodel Disk -- This IBM-PC (or compatible) high density diskette contains the library of LTC op amp SPICE macromodels. The models can be used with any version of SPICE for general analog circuit simulations. The diskette also contains working circuit examples using the models and a demonstration copy of PSPICETM by MicroSim. Available at no charge SwitcherCADTM -- The SwitcherCAD program is a powerful PC software tool that aids in the design and optimization of switching regulators. The program can cut days off the design cycle by selecting topologies, calculating operating points and specifying component values and manufacturer's part numbers. 144 page manual included. $20.00 SwitcherCAD supports the following parts: LT1070 series: LT1070, LT1071, LT1072, LT1074 and LT1076. LT1082. LT1170 series: LT1170, LT1171, LT1172 and LT1176. It also supports: LT1268, LT1269 and LT1507. LT1270 series: LT1270 and LT1271. LT1371 series: LT1371, LT1372, LT1373, LT1375, LT1376 and LT1377. Micropower SwitcherCADTM -- The MicropowerSCAD program is a powerful tool for designing DC/DC converters based on Linear Technology's micropower switching regulator ICs. Given basic design parameters, MicropowerSCAD selects a circuit topology and offers you a selection of appropriate Linear Technology switching regulator ICs. MicropowerSCAD also performs circuit simulations to select the other components which surround the DC/DC converter. In the case of a battery supply, MicropowerSCAD can perform a battery life simulation. 44 page manual included. $20.00 MicropowerSCAD supports the following LTC micropower DC/DC converters: LT1073, LT1107, LT1108, LT1109, LT1109A, LT1110, LT1111, LT1173, LTC1174, LT1300, LT1301 and LT1303. Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, Linear Technology makes no representation that the circuits described herein will not infringe on existing patent rights. Linear Technology Magazine * February 1999 1992 Linear Databook, Vol II -- This 1248 page supplement to the 1990 Linear Databook is a collection of all products introduced in 1991 and 1992. The catalog contains full data sheets for over 140 devices. The 1992 Linear Databook, Vol II is a companion to the 1990 Linear Databook, which should not be discarded. $10.00 1994 Linear Databook, Vol III --This 1826 page supplement to the 1990 and 1992 Linear Databooks is a collection of all products introduced since 1992. A total of 152 product data sheets are included with updated selection guides. The 1994 Linear Databook Vol III is a companion to the 1990 and 1992 Linear Databooks, which should not be discarded. $10.00 1995 Linear Databook, Vol IV --This 1152 page supplement to the 1990, 1992 and 1994 Linear Databooks is a collection of all products introduced since 1994. A total of 80 product data sheets are included with updated selection guides. The 1995 Linear Databook Vol IV is a companion to the 1990, 1992 and 1994 Linear Databooks, which should not be discarded. $10.00 1996 Linear Databook, Vol V --This 1152 page supplement to the 1990, 1992, 1994 and 1995 Linear Databooks is a collection of all products introduced since 1995. A total of 65 product data sheets are included with updated selection guides. The 1996 Linear Databook Vol V is a companion to the 1990, 1992, 1994 and 1995 Linear Databooks, which should not be discarded. $10.00 1997 Linear Databook, Vol VI --This 1360 page supplement to the 1990, 1992, 1994, 1995 and 1996 Linear Databooks is a collection of all products introduced since 1996. A total of 79 product data sheets are included with updated selection guides. The 1997 Linear Databook Vol VI is a companion to the 1990, 1992, 1994, 1995 and 1996 Linear Databooks, which should not be discarded. $10.00 1990 Linear Applications Handbook, Volume I -- 928 pages full of application ideas covered in depth by 40 Application Notes and 33 Design Notes. This catalog covers a broad range of "real world" linear circuitry. In addition to detailed, systems-oriented circuits, this handbook contains broad tutorial content together with liberal use of schematics and scope photography. A special feature in this edition includes a 22-page section on SPICE macromodels. $20.00 1993 Linear Applications Handbook, Volume II -- Continues the stream of "real world" linear circuitry initiated by the 1990 Handbook. Similar in scope to the 1990 edition, the new book covers Application Notes 40 through 54 and Design Notes 33 through 69. References and articles from non-LTC publications that we have found useful are also included. $20.00 1997 Linear Applications Handbook, Volume III -- This 976 page handbook maintains the practical outlook and tutorial nature of previous efforts, while broadening topic selection. This new book includes Application Notes 55 through 69 and Design Notes 70 through 144. Subjects include switching regulators, measurement and control circuits, filters, video designs, interface, data converters, power products, battery chargers and CCFL inverters. An extensive subject index references circuits in LTC data sheets, design notes, application notes and Linear Technology magazines. $20.00 1998 Data Converter Handbook -- This impressive 1360 page handbook includes all of the data sheets, application notes and design notes for Linear Technology's family of high performance data converter products. Products include A/D converters (ADCs), D/A converters (DACs) and multiplexers--including the fastest monolithic 16-bit ADC, the 3Msps, 12-bit ADC with the best dynamic performance and the first dual 12-bit DAC in an SO-8 package. Also included are selection guides for references, op amps and filters and a glossary of data converter terms. $10.00 Interface Product Handbook -- This 424 page handbook features LTC's complete line of line driver and receiver products for RS232, RS485, RS423, RS422, V.35 and AppleTalk(R) applications. Linear's particular expertise in this area involves low power consumption, high numbers of drivers and receivers in one package, mixed RS232 and RS485 devices, 10kV ESD protection of RS232 devices and surface mount packages. Available at no charge Power Solutions Brochure -- This collection of circuits contains real-life solutions for common power supply design problems. There are over 70 circuits, including descriptions, graphs and performance specifications. Topics covered include battery chargers, power supplies for desktop and portable computers, supplies for portable electronics, telecommunications supplies, offline supplies and various other power management techniques, including Hot SwapTM circuits. Available at no charge Data Conversion Solutions Brochure -- This 64 page collection of data conversion circuits, products and selection guides serves as excellent reference for the data acquisition system designer. Over 60 products are showcased, solving problems in low power, small size and high performance data conversion applications-- with performance graphs and specifications. Topics covered include ADCs, DACs, voltage references and analog multiplexers. A complete glossary defines data conversion specifications; a list of selected application and design notes is also included. Available at no charge Telecommunications Solutions Brochure -- This collection of circuits, new products and selection guides covers a wide variety of products targeted for the telecommunications industry. Circuits solving real life problems are shown for central office switching, cellular phone, base station and other telecom applications. New products introduced include high speed amplifiers, A/D converters, power products, interface transceivers and filters. Reference material includes a telecommunications glossary, serial interface standards, protocol information and a complete list of key application notes and design notes. Available at no charge continued on page 40 39 DESIGN TOOLS, continued from page 39 CD-ROM Catalog LinearView -- LinearViewTM CD-ROM version 3.0 is Linear Technology's latest interactive CD-ROM. It allows you to instantly access thousands of pages of product and applications information, covering Linear Technology's complete line of high performance analog products, with easy-to-use search tools. The LinearView CD-ROM includes the complete product specifications from Linear Technology's Databook library (Volumes I-VI) and the complete Applications Handbook collection (Volumes I-III). Our extensive collection of Design Notes and the complete collection of Linear Technology magazine are also included. A powerful search engine built into the LinearView CDROM enables you to select parts by various criteria, such as device parameters, keywords or part numbers. All product categories are represented: data conversion, references, amplifiers, power products, filters and interface circuits. Up-to-date versions of Linear Technology's software design tools, SwitcherCAD, Micropower SwitcherCAD, FilterCAD, Noise Disk and Spice Macromodel library, are also included. Everything you need to know about Linear Technology's products and applications is readily accessible via LinearView. LinearView runs under Windows 95 and Macintosh(R) System 8.0 or later. Available at no charge. World Wide Web Site Linear Technology Corporation's customers can now quickly and conveniently find and retrieve the latest technical information covering the Company's products on LTC's internet web site. Located at www.lineartech.com, this site allows anyone with internet access and a web browser to search through all of LTC's technical publications, including data sheets, application notes, design notes, Linear Technology magazine issues and other LTC publications, to find information on LTC parts and applications circuits. Other areas within the site include help, news and information about Linear Technology and its sales offices. Linear Technology Corporation 1630 McCarthy Boulevard Milpitas, CA 95035-7417 Phone: (408) 432-1900 FAX: (408) 434-0507 LinearTechnologyCorporation 1080 W. Sam Houston Pkwy., Suite 225 Houston, TX 77043 Phone: (713) 463-5001 FAX: (713) 463-5009 U.S. Area Sales Offices Linear Technology Corporation 5510 Six Forks Road, Suite 102 Raleigh, NC 27609 Phone: (919) 870-5106 FAX: (919) 870-8831 Linear Technology Corporation 266 Lowell St., Suite B-8 Wilmington, MA 01887 Phone: (978) 658-3881 FAX: (978) 658-2701 NORTHWEST REGION Linear Technology Corporation 720 Sycamore Drive Milpitas, CA 95035 Phone: (408) 428-2050 FAX: (408) 432-6331 SOUTHEAST REGION Linear Technology Corporation 17000 Dallas Parkway, Suite 219 Dallas, TX 75248 Phone: (972) 733-3071 FAX: (972) 380-5138 The site is searchable by criteria such as part numbers, functions, topics and applications. The search is performed on a user-defined combination of data sheets, application notes, design notes and Linear Technology magazine articles. Any data sheet, application note, design note or magazine article can be downloaded or faxed back. (files are downloaded in Adobe Acrobat PDF format; you will need a copy of Acrobat Reader to view or print them. The site includes a link from which you can download this program.) Acrobat is a trademark of Adobe Systems, Inc.; Windows is a registered trademark of Microsoft Corp.; Macintosh and AppleTalk are registered trademarks of Apple Computer, Inc. PSPICE is a trademark of MicroSim Corp. International Sales Offices World Headquarters NORTHEAST REGION Linear Technology Corporation 3220 Tillman Drive, Suite 120 Bensalem, PA 19020 Phone: (215) 638-9667 FAX: (215) 638-9764 Other web sites usually require the visitor to download large document files to see if they contain the desired information. This is cumbersome and inconvenient. To save you time and ensure that you receive the correct information the first time, the first page of each data sheet, application note and Linear Technology magazine is recreated in a fast, download-friendly format. This allows you to determine whether the document is what you need, before downloading the entire file. CENTRAL REGION LinearTechnologyCorporation 2010 E. Algonquin Road, Suite 209 Schaumburg, IL 60173 Phone: (847) 925-0860 FAX: (847) 925-0878 LinearTechnologyCorporation Kenosha, WI 53144 Phone: (414) 859-1900 FAX: (414) 859-1974 SOUTHWEST REGION Linear Technology Corporation 21243 Ventura Blvd., Suite 208 Woodland Hills, CA 91364 Phone: (818) 703-0835 FAX: (818) 703-0517 Linear Technology Corporation 15375 Barranca Parkway, Suite A-213 Irvine, CA 92618 Phone: (949) 453-4650 FAX: (949) 453-4765 LinearTechnologyCorporation 9430 Research Blvd. Echelon IV Suite 400 Austin, TX 78759 Phone: (512) 343-3679 FAX: (512) 343-3680 (c) 1999 Linear Technology Corporation/Printed in U.S.A./ 41K FRANCE Linear Technology S.A.R.L. Immeuble "Le Quartz" 58 Chemin de la Justice 92290 Chatenay Malabry France Phone: 33-1-41079555 FAX: 33-1-46314613 SINGAPORE Linear Technology Pte. Ltd. 507 Yishun Industrial Park A Singapore 768734 Phone: 65-753-2692 FAX: 65-752-0108 SWEDEN Linear Technology AB Sollentunavagen 63 S-191 40 Sollentuna Sweden Phone: (08)-623-1600 FAX: (08)-623-1650 GERMANY Linear Technology GmbH Oskar-Messter-Str. 24 D-85737 Ismaning Germany Phone: 49-89-962455-0 FAX: 49-89-963147 JAPAN Linear Technology KK 5F NAO Bldg. 1-14 Shin-Ogawa-cho Shinjuku-ku Tokyo, 162 Japan Phone: 81-3-3267-7891 FAX: 81-3-3267-8510 KOREA Linear Technology Korea Co., Ltd Namsong Building, #403 Itaewon-Dong 260-199 Yongsan-Ku, Seoul 140-200 Korea Phone: 82-2-792-1617 FAX: 82-2-792-1619 TAIWAN Linear Technology Corporation Rm. 602, No. 46, Sec. 2 Chung Shan N. Rd. Taipei, Taiwan, R.O.C. Phone: 886-2-521-7575 FAX: 886-2-562-2285 UNITED KINGDOM Linear Technology (UK) Ltd. The Coliseum, Riverside Way Camberley, Surrey GU15 3YL United Kingdom Phone: 44-1276-677676 FAX: 44-1276-64851 LINEAR TECHNOLOGY CORPORATION 1630 McCarthy Boulevard Milpitas, CA 95035-7417 (408) 432-1900 FAX (408) 434-0507 www.linear-tech.com For Literature Only: 1-800-4-LINEAR Linear Technology Magazine * February 1999